diff options
| author | Chee Hong Ang <chee.hong.ang@intel.com> | 2020-08-06 07:15:33 +0300 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-10-09 12:53:12 +0300 |
| commit | 2473e13bb8e81cf90e89863125e85900193b01b7 (patch) | |
| tree | 58bb0dfdcc53924cee9f511aa6343c4c720fcaa7 /arch | |
| parent | b3e2d9fccbe7390a859f7f46001c6312cc35455c (diff) | |
| download | u-boot-2473e13bb8e81cf90e89863125e85900193b01b7.tar.xz | |
arm: socfpga: Use DM watchdog timer
All SoCFPGA platforms (except Cyclone V) are now switching
to CONFIG_WDT (driver model for watchdog timer drivers)
from CONFIG_HW_WATCHDOG.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi | 4 | ||||
| -rwxr-xr-x | arch/arm/dts/socfpga_stratix10.dtsi | 1 | ||||
| -rwxr-xr-x | arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_agilex.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/spl_s10.c | 2 |
6 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi index debeb8b239..6cac36a1fc 100644 --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi @@ -40,3 +40,7 @@ &qspi { status = "okay"; }; + +&watchdog0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi index 58cd497821..22e614d04c 100644 --- a/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk-u-boot.dtsi @@ -15,3 +15,7 @@ &uart1 { u-boot,dm-pre-reloc; }; + +&watchdog1 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi index a8e61cf728..cb799bc551 100755 --- a/arch/arm/dts/socfpga_stratix10.dtsi +++ b/arch/arm/dts/socfpga_stratix10.dtsi @@ -386,7 +386,6 @@ reg = <0xffd00200 0x100>; interrupts = <0 117 4>; resets = <&rst WATCHDOG0_RESET>; - u-boot,dm-pre-reloc; status = "disabled"; }; diff --git a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi index a903040d60..2669abb383 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_stratix10_socdk-u-boot.dtsi @@ -33,5 +33,6 @@ }; &watchdog0 { + status = "okay"; u-boot,dm-pre-reloc; }; diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c index 0121ff431f..78b5d7c8d9 100644 --- a/arch/arm/mach-socfpga/spl_agilex.c +++ b/arch/arm/mach-socfpga/spl_agilex.c @@ -51,11 +51,11 @@ void board_init_f(ulong dummy) socfpga_get_managers_addr(); -#ifdef CONFIG_HW_WATCHDOG /* Ensure watchdog is paused when debugging is happening */ writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); +#ifdef CONFIG_HW_WATCHDOG /* Enable watchdog before initializing the HW */ socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0); diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index 1f7118226c..daed05653a 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -53,11 +53,11 @@ void board_init_f(ulong dummy) socfpga_get_managers_addr(); -#ifdef CONFIG_HW_WATCHDOG /* Ensure watchdog is paused when debugging is happening */ writel(SYSMGR_WDDBG_PAUSE_ALL_CPU, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG); +#ifdef CONFIG_HW_WATCHDOG /* Enable watchdog before initializing the HW */ socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0); |