diff options
author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-01-10 13:47:03 +0300 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2018-01-25 01:27:21 +0300 |
commit | 34df58a95efc56f469b520e9e63e4aaddc4796ee (patch) | |
tree | 01ed9fb879cde094194734a85010930b4fe37431 /arch | |
parent | 62b2bb537444f8d698a15beefd2a039989782bfd (diff) | |
download | u-boot-34df58a95efc56f469b520e9e63e4aaddc4796ee.tar.xz |
ARM: dts: rmobile: Factor out U-Boot extras
Pull out u-boot extras into dtsi files to make synchronization of DTS
from Linux kernel as easy as a simple copy. All the U-Boot extras are
now in *-u-boot.dts* files instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/r8a7795-h3ulcb-u-boot.dts | 10 | ||||
-rw-r--r-- | arch/arm/dts/r8a7795-salvator-x-u-boot.dts | 10 | ||||
-rw-r--r-- | arch/arm/dts/r8a7795-u-boot.dtsi | 13 | ||||
-rw-r--r-- | arch/arm/dts/r8a7795.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/dts/r8a7796-m3ulcb-u-boot.dts | 10 | ||||
-rw-r--r-- | arch/arm/dts/r8a7796-salvator-x-u-boot.dts | 10 | ||||
-rw-r--r-- | arch/arm/dts/r8a7796-u-boot.dtsi | 13 | ||||
-rw-r--r-- | arch/arm/dts/r8a7796.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/dts/r8a77970-eagle-u-boot.dts | 10 | ||||
-rw-r--r-- | arch/arm/dts/r8a77970-u-boot.dtsi | 13 | ||||
-rw-r--r-- | arch/arm/dts/r8a77970.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/dts/r8a77995-draak-u-boot.dts | 10 | ||||
-rw-r--r-- | arch/arm/dts/r8a77995-u-boot.dtsi | 9 | ||||
-rw-r--r-- | arch/arm/dts/r8a77995.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/dts/r8a779x-u-boot.dtsi | 25 |
15 files changed, 133 insertions, 19 deletions
diff --git a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts b/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts new file mode 100644 index 0000000000..56b172189b --- /dev/null +++ b/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts @@ -0,0 +1,10 @@ +/* + * Device Tree Source extras for U-Boot for the ULCB board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a7795-h3ulcb.dts" +#include "r8a7795-u-boot.dtsi" diff --git a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts b/arch/arm/dts/r8a7795-salvator-x-u-boot.dts new file mode 100644 index 0000000000..f2c10ed700 --- /dev/null +++ b/arch/arm/dts/r8a7795-salvator-x-u-boot.dts @@ -0,0 +1,10 @@ +/* + * Device Tree Source extras for U-Boot for the Salvator-X board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a7795-salvator-x.dts" +#include "r8a7795-u-boot.dtsi" diff --git a/arch/arm/dts/r8a7795-u-boot.dtsi b/arch/arm/dts/r8a7795-u-boot.dtsi new file mode 100644 index 0000000000..41a6ef4853 --- /dev/null +++ b/arch/arm/dts/r8a7795-u-boot.dtsi @@ -0,0 +1,13 @@ +/* + * Device Tree Source extras for U-Boot on RCar R8A7795 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a7795.dtsi index d9f556755e..f7dc147317 100644 --- a/arch/arm/dts/r8a7795.dtsi +++ b/arch/arm/dts/r8a7795.dtsi @@ -129,7 +129,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; extalr_clk: extalr { @@ -137,7 +136,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; /* @@ -191,7 +189,6 @@ #address-cells = <2>; #size-cells = <2>; ranges; - u-boot,dm-pre-reloc; gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; @@ -383,7 +380,6 @@ #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; - u-boot,dm-pre-reloc; }; rst: reset-controller@e6160000 { @@ -394,7 +390,6 @@ prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; - u-boot,dm-pre-reloc; }; sysc: system-controller@e6180000 { diff --git a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts b/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts new file mode 100644 index 0000000000..a8cb4252ba --- /dev/null +++ b/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts @@ -0,0 +1,10 @@ +/* + * Device Tree Source extras for U-Boot for the ULCB board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a7796-m3ulcb.dts" +#include "r8a7796-u-boot.dtsi" diff --git a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts b/arch/arm/dts/r8a7796-salvator-x-u-boot.dts new file mode 100644 index 0000000000..1e28d93a93 --- /dev/null +++ b/arch/arm/dts/r8a7796-salvator-x-u-boot.dts @@ -0,0 +1,10 @@ +/* + * Device Tree Source extras for U-Boot for the Salvator-X board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a7796-salvator-x.dts" +#include "r8a7796-u-boot.dtsi" diff --git a/arch/arm/dts/r8a7796-u-boot.dtsi b/arch/arm/dts/r8a7796-u-boot.dtsi new file mode 100644 index 0000000000..daece9579a --- /dev/null +++ b/arch/arm/dts/r8a7796-u-boot.dtsi @@ -0,0 +1,13 @@ +/* + * Device Tree Source extras for U-Boot on RCar R8A7796 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a7796.dtsi index ed758d1c01..83faabe040 100644 --- a/arch/arm/dts/r8a7796.dtsi +++ b/arch/arm/dts/r8a7796.dtsi @@ -111,7 +111,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; extalr_clk: extalr { @@ -119,7 +118,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; /* @@ -172,7 +170,6 @@ #address-cells = <2>; #size-cells = <2>; ranges; - u-boot,dm-pre-reloc; gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; @@ -366,7 +363,6 @@ #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; - u-boot,dm-pre-reloc; }; rst: reset-controller@e6160000 { @@ -377,7 +373,6 @@ prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; - u-boot,dm-pre-reloc; }; sysc: system-controller@e6180000 { diff --git a/arch/arm/dts/r8a77970-eagle-u-boot.dts b/arch/arm/dts/r8a77970-eagle-u-boot.dts new file mode 100644 index 0000000000..1c9dd2548a --- /dev/null +++ b/arch/arm/dts/r8a77970-eagle-u-boot.dts @@ -0,0 +1,10 @@ +/* + * Device Tree Source extras for U-Boot for the Eagle board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a77970-eagle.dts" +#include "r8a77970-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi new file mode 100644 index 0000000000..db121a1e2a --- /dev/null +++ b/arch/arm/dts/r8a77970-u-boot.dtsi @@ -0,0 +1,13 @@ +/* + * Device Tree Source extras for U-Boot on RCar R8A77970 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi index f022702a51..78e6f89e30 100644 --- a/arch/arm/dts/r8a77970.dtsi +++ b/arch/arm/dts/r8a77970.dtsi @@ -48,7 +48,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; extalr_clk: extalr { @@ -56,7 +55,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; /* External SCIF clock - to be overridden by boards that provide it */ @@ -73,7 +71,6 @@ #address-cells = <2>; #size-cells = <2>; ranges; - u-boot,dm-pre-reloc; gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; @@ -112,7 +109,6 @@ #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; - u-boot,dm-pre-reloc; }; rst: reset-controller@e6160000 { @@ -150,7 +146,6 @@ prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; - u-boot,dm-pre-reloc; }; dmac1: dma-controller@e7300000 { diff --git a/arch/arm/dts/r8a77995-draak-u-boot.dts b/arch/arm/dts/r8a77995-draak-u-boot.dts new file mode 100644 index 0000000000..4f4aa4d602 --- /dev/null +++ b/arch/arm/dts/r8a77995-draak-u-boot.dts @@ -0,0 +1,10 @@ +/* + * Device Tree Source extras for U-Boot for the Draak board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a77995-draak.dts" +#include "r8a77995-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77995-u-boot.dtsi b/arch/arm/dts/r8a77995-u-boot.dtsi new file mode 100644 index 0000000000..6a944ddd5c --- /dev/null +++ b/arch/arm/dts/r8a77995-u-boot.dtsi @@ -0,0 +1,9 @@ +/* + * Device Tree Source extras for U-Boot on RCar R8A77995 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include "r8a779x-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77995.dtsi b/arch/arm/dts/r8a77995.dtsi index ae164a04af..d1a03cf811 100644 --- a/arch/arm/dts/r8a77995.dtsi +++ b/arch/arm/dts/r8a77995.dtsi @@ -47,7 +47,6 @@ #clock-cells = <0>; /* This value must be overridden by the board */ clock-frequency = <0>; - u-boot,dm-pre-reloc; }; scif_clk: scif { @@ -62,7 +61,6 @@ #address-cells = <2>; #size-cells = <2>; ranges; - u-boot,dm-pre-reloc; gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; @@ -116,7 +114,6 @@ #clock-cells = <2>; #power-domain-cells = <0>; #reset-cells = <1>; - u-boot,dm-pre-reloc; }; rst: reset-controller@e6160000 { @@ -132,7 +129,6 @@ prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; - u-boot,dm-pre-reloc; }; sysc: system-controller@e6180000 { diff --git a/arch/arm/dts/r8a779x-u-boot.dtsi b/arch/arm/dts/r8a779x-u-boot.dtsi new file mode 100644 index 0000000000..0baac1d2c5 --- /dev/null +++ b/arch/arm/dts/r8a779x-u-boot.dtsi @@ -0,0 +1,25 @@ +/* + * Device Tree Source extras for U-Boot on RCar Gen3 + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&cpg { + u-boot,dm-pre-reloc; +}; + +&extal_clk { + u-boot,dm-pre-reloc; +}; + +&prr { + u-boot,dm-pre-reloc; +}; |