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author | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-09-07 20:02:06 +0300 |
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committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-09-22 22:04:10 +0300 |
commit | 46203baf665c6bab72bd5945a37d9a7e0a77699a (patch) | |
tree | 11dc24ca3159708afca9207372934b323363907d /arch | |
parent | 5ef337a0371e2b2c7905e7e20a38b6bfc80bb708 (diff) | |
download | u-boot-46203baf665c6bab72bd5945a37d9a7e0a77699a.tar.xz |
MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODE
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/lib/cache_init.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/mips/lib/cache_init.S b/arch/mips/lib/cache_init.S index 5616ee6dfd..cfad1d9c8a 100644 --- a/arch/mips/lib/cache_init.S +++ b/arch/mips/lib/cache_init.S @@ -14,10 +14,6 @@ #include <asm/cacheops.h> #include <asm/cm.h> -#ifndef CONFIG_SYS_MIPS_CACHE_MODE -#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT -#endif - .macro f_fill64 dst, offset, val LONG_S \val, (\offset + 0 * LONGSIZE)(\dst) LONG_S \val, (\offset + 1 * LONGSIZE)(\dst) @@ -331,7 +327,7 @@ l1_init: and t0, t0, t1 PTR_LI t1, CKSEG1 or t0, t0, t1 - li a0, CONFIG_SYS_MIPS_CACHE_MODE + li a0, CONF_CM_CACHABLE_NONCOHERENT jalr.hb t0 /* |