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authorMarek Vasut <marex@denx.de>2019-11-21 00:36:45 +0300
committerMarek Vasut <marex@denx.de>2019-11-25 15:12:56 +0300
commit533832c6a47b5f7463f3b1d20337d2746f568b24 (patch)
treeeb61da36801fb404c836ba7edbad15b76a211dec /arch
parent2007a730eef83421cc6ca3c1875fa0e0b4d4712e (diff)
downloadu-boot-533832c6a47b5f7463f3b1d20337d2746f568b24.tar.xz
ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
The NAND devices with 128 kiB erase blocks require extra 64 kiB padding between each SPL image. Generate U-Boot image with such a padding using this new target. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
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