diff options
author | Dzmitry Sankouski <dsankouski@gmail.com> | 2021-10-17 13:45:41 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-10-31 18:25:39 +0300 |
commit | 69bde0410a9ce5749a4cab5ed134527c2cb8b9e4 (patch) | |
tree | 8f49222101109ad851c7a5d9440c8ef0199c22f9 /arch | |
parent | d8428f73c34b6edb322d7736741d069a81919ef6 (diff) | |
download | u-boot-69bde0410a9ce5749a4cab5ed134527c2cb8b9e4.tar.xz |
SoC: exynos: add support for exynos 78x0
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets
introduced on March 2017.
Features:
- 8 Cortex A53 cores
- ARM Mali-T830 MP3 GPU
- LTE Cat. 7 (7880) or 6 (7870) modem
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/exynos78x0-gpio.dtsi | 204 | ||||
-rw-r--r-- | arch/arm/dts/exynos78x0-pinctrl.dtsi | 280 | ||||
-rw-r--r-- | arch/arm/dts/exynos78x0.dtsi | 98 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mmu-arm64.c | 66 |
4 files changed, 648 insertions, 0 deletions
diff --git a/arch/arm/dts/exynos78x0-gpio.dtsi b/arch/arm/dts/exynos78x0-gpio.dtsi new file mode 100644 index 0000000000..a7f75c5ca9 --- /dev/null +++ b/arch/arm/dts/exynos78x0-gpio.dtsi @@ -0,0 +1,204 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Samsung's Exynos7880 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + /* ALIVE */ + gpio@139F0000 { + etc0: etc0 { + gpio-controller; + #gpio-cells = <2>; + }; + + etc1: etc1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpa3: gpa3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpq0: gpq0 { + gpio-controller; + #gpio-cells = <2>; + }; + }; + + /* CCORE */ + gpio@10630000 { + gpm0: gpm0 { + gpio-controller; + #gpio-cells = <2>; + }; + }; + + /* DISP/AUD */ + gpio@148C0000 { + gpz0: gpz0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpz1: gpz1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpz2: gpz2 { + gpio-controller; + #gpio-cells = <2>; + }; + }; + + /* FSYS0 */ + gpio@13750000 { + gpr0: gpr0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpr1: gpr1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpr2: gpr2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpr3: gpr3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpr4: gpr4 { + gpio-controller; + #gpio-cells = <2>; + }; + }; + + /* TOP */ + gpio@139B0000 { + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc4: gpc4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc5: gpc5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc6: gpc6 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc8: gpc8 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpc9: gpc9 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd2: gpd2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd3: gpd3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd4: gpd4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd5: gpd5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf2: gpf2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf3: gpf3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpf4: gpf4 { + gpio-controller; + #gpio-cells = <2>; + }; + }; +}; diff --git a/arch/arm/dts/exynos78x0-pinctrl.dtsi b/arch/arm/dts/exynos78x0-pinctrl.dtsi new file mode 100644 index 0000000000..4958c55119 --- /dev/null +++ b/arch/arm/dts/exynos78x0-pinctrl.dtsi @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Samsung's Exynos7880 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com) + * + * Samsung's Exynos7880 SoC pin-mux and pin-config options are listed as device + * tree nodes are listed in this file. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + /* ALIVE */ + pinctrl@139F0000 { + uart2_bus: uart2-bus { + samsung,pins = "gpa1-1", "gpa1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + }; + + dwmmc2_cd_ext_irq: dwmmc2_cd_ext_irq { + samsung,pins = "gpa3-3"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <4>; + }; + + key_power: key-power { + samsung,pins = "gpa0-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + key_voldown: key-voldown { + samsung,pins = "gpa2-1"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + key_volup: key-volup { + samsung,pins = "gpa2-0"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + key_home: key-home { + samsung,pins = "gpa1-7"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + }; + + /* TOP */ + pinctrl@139B0000 { + i2c0_bus: i2c0-bus { + samsung,pins = "gpc1-1", "gpc1-0"; + samsung,pin-function = <2>; + }; + + sd0_rst: sd0_rst { + samsung,pins = "gpc0-2"; + samsung,pin-function = <0>; + }; + }; + + /* DISP/AUD */ + pinctrl@148C0000 { + i2s_pmic_bus: i2s-pmic-bus { + samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3", "gpz1-4"; + samsung,pin-function = <2>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + + i2s_pmic_bus_idle: i2s-pmic-bus_idle { + samsung,pins = "gpz1-0", "gpz1-1", "gpz1-2", "gpz1-3", "gpz1-4"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; + }; + + /* FSYS0 */ + pinctrl@13750000 { + sd0_clk: sd0-clk { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpr0-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd0_rdqs: sd0-rdqs { + samsung,pins = "gpr0-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd0_clk_fast_slew_rate_1x: sd0-clk_fast_slew_rate_1x { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + sd0_clk_fast_slew_rate_2x: sd0-clk_fast_slew_rate_2x { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <1>; + }; + + sd0_clk_fast_slew_rate_3x: sd0-clk_fast_slew_rate_3x { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd0_clk_fast_slew_rate_4x: sd0-clk_fast_slew_rate_4x { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + + sd0_clk_fast_slew_rate_5x: sd0-clk_fast_slew_rate_5x { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <4>; + }; + + sd0_clk_fast_slew_rate_6x: sd0-clk_fast_slew_rate_6x { + samsung,pins = "gpr0-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <5>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpr1-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpr1-1", "gpr1-2", "gpr1-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpr1-4", "gpr1-5", "gpr1-6", "gpr1-7"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpr2-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpr2-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpr3-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + samsung,pin-con-pdn = <2>; + samsung,pin-pud-pdn = <3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpr3-1", "gpr3-2", "gpr3-3"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + samsung,pin-con-pdn = <2>; + samsung,pin-pud-pdn = <3>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpr4-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpr4-1"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpr4-2"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpr4-3", "gpr4-4", "gpr4-5"; + samsung,pin-function = <2>; + samsung,pin-pud = <3>; + samsung,pin-drv = <2>; + }; + + sd2_clk_output: sd2-clk-output { + samsung,pins = "gpr4-0"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd2_cmd_output: sd2-cmd-output { + samsung,pins = "gpr4-1"; + samsung,pin-function = <1>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd2_clk_fast_slew_rate_1x: sd2-clk_fast_slew_rate_1x { + samsung,pins = "gpr4-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + + sd2_clk_fast_slew_rate_2x: sd2-clk_fast_slew_rate_2x { + samsung,pins = "gpr4-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <1>; + }; + + sd2_clk_fast_slew_rate_3x: sd2-clk_fast_slew_rate_3x { + samsung,pins = "gpr4-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <2>; + }; + + sd2_clk_fast_slew_rate_4x: sd2-clk_fast_slew_rate_4x { + samsung,pins = "gpr4-0"; + samsung,pin-function = <2>; + samsung,pin-pud = <0>; + samsung,pin-drv = <3>; + }; + }; +}; diff --git a/arch/arm/dts/exynos78x0.dtsi b/arch/arm/dts/exynos78x0.dtsi new file mode 100644 index 0000000000..fb9c9cbdf9 --- /dev/null +++ b/arch/arm/dts/exynos78x0.dtsi @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Samsung Exynos7880 SoC device tree source + * + * Copyright (c) 2020 Dzmitry Sankouski (dsankouski@gmail.com) + */ + +/dts-v1/; +#include "skeleton.dtsi" +#include "exynos78x0-pinctrl.dtsi" +#include "exynos78x0-gpio.dtsi" +/ { + compatible = "samsung,exynos7880"; + + fin_pll: xxti { + compatible = "fixed-clock"; + clock-output-names = "fin_pll"; + u-boot,dm-pre-reloc; + #clock-cells = <0>; + }; + + /* Dummy clock for uart */ + fin_uart: uart_dummy_fin { + compatible = "fixed-clock"; + clock-output-names = "fin_uart"; + clock-frequency = <132710400>; + u-boot,dm-pre-reloc; + #clock-cells = <0>; + }; + + uart2: serial@13820000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x13820000 0x100>; + u-boot,dm-pre-reloc; + clocks = <&fin_uart>, <&fin_uart>; // driver uses 1st clock + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart2_bus>; + }; + + gpioi2c0: i2c-0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "i2c-gpio"; + status = "disabled"; + gpios = < + &gpc1 0 0 /* sda */ + &gpc1 1 0 /* scl */ + >; + i2c-gpio,delay-us = <5>; + + s2mu004@3d { + compatible = "samsung,s2mu004mfd"; + }; + }; + + /* ALIVE */ + pinctrl_0: pinctrl@139F0000 { + compatible = "samsung,exynos78x0-pinctrl"; + reg = <0x139F0000 0x1000>; + }; + + /* DISP/AUD */ + pinctrl_2: pinctrl@148C0000 { + compatible = "samsung,exynos78x0-pinctrl"; + reg = <0x148C0000 0x1000>; + }; + + /* FSYS0 */ + pinctrl_4: pinctrl@13750000 { + compatible = "samsung,exynos78x0-pinctrl"; + reg = <0x13750000 0x1000>; + }; + + /* ALIVE */ + gpio_0: gpio@139F0000 { + compatible = "samsung,exynos78x0-gpio"; + reg = <0x139F0000 0x1000>; + }; + + /* DISP/AUD */ + gpio_2: gpio@148C0000 { + compatible = "samsung,exynos78x0-gpio"; + reg = <0x148C0000 0x1000>; + }; + + /* FSYS0 */ + gpio_4: gpio@13750000 { + compatible = "samsung,exynos78x0-gpio"; + reg = <0x13750000 0x1000>; + }; + + /* TOP */ + gpio_6: gpio@139B0000 { + compatible = "samsung,exynos78x0-gpio"; + reg = <0x139B0000 0x1000>; + }; +}; diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c index 46b8169d19..e3bd995143 100644 --- a/arch/arm/mach-exynos/mmu-arm64.c +++ b/arch/arm/mach-exynos/mmu-arm64.c @@ -29,3 +29,69 @@ static struct mm_region exynos7420_mem_map[] = { struct mm_region *mem_map = exynos7420_mem_map; #endif + +#ifdef CONFIG_EXYNOS7870 +static struct mm_region exynos7870_mem_map[] = { + { + .virt = 0x10000000UL, + .phys = 0x10000000UL, + .size = 0x10000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN, + }, + { + .virt = 0x40000000UL, + .phys = 0x40000000UL, + .size = 0x3E400000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE, + }, + { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x40000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE, + }, + + { + /* List terminator */ + }, +}; + +struct mm_region *mem_map = exynos7870_mem_map; +#endif + +#ifdef CONFIG_EXYNOS7880 +static struct mm_region exynos7880_mem_map[] = { + { + .virt = 0x10000000UL, + .phys = 0x10000000UL, + .size = 0x10000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN, + }, + { + .virt = 0x40000000UL, + .phys = 0x40000000UL, + .size = 0x3E400000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE, + }, + { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE, + }, + + { + /* List terminator */ + }, +}; + +struct mm_region *mem_map = exynos7880_mem_map; +#endif |