diff options
| author | Sean Anderson <seanga2@gmail.com> | 2020-10-26 04:46:56 +0300 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-10-26 05:01:28 +0300 |
| commit | 79b135f1f937296fbe40ffa8500b531a7e1a0e9d (patch) | |
| tree | b196ad1c9d28d1b4528752e10d1c7960436734bd /arch | |
| parent | 963911e9e1c17b2f973ff49ddd51060d6c340c5f (diff) | |
| download | u-boot-79b135f1f937296fbe40ffa8500b531a7e1a0e9d.tar.xz | |
riscv: Move Andes PLMT driver to drivers/timer
This is a regular timer driver, and should live with the other timer
drivers.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/Kconfig | 7 | ||||
| -rw-r--r-- | arch/riscv/lib/Makefile | 1 | ||||
| -rw-r--r-- | arch/riscv/lib/andes_plmt.c | 50 |
3 files changed, 0 insertions, 58 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 756047636d..30b05408b1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -170,13 +170,6 @@ config ANDES_PLIC The Andes PLIC block holds memory-mapped claim and pending registers associated with software interrupt. -config ANDES_PLMT - bool - depends on RISCV_MMODE || SPL_RISCV_MMODE - help - The Andes PLMT block holds memory-mapped mtime register - associated with timer tick. - config SYS_MALLOC_F_LEN default 0x1000 diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 10ac5b06d3..12c14f2019 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -13,7 +13,6 @@ obj-y += cache.o ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o obj-$(CONFIG_ANDES_PLIC) += andes_plic.o -obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o else obj-$(CONFIG_SBI) += sbi.o obj-$(CONFIG_SBI_IPI) += sbi_ipi.o diff --git a/arch/riscv/lib/andes_plmt.c b/arch/riscv/lib/andes_plmt.c deleted file mode 100644 index cec86718c7..0000000000 --- a/arch/riscv/lib/andes_plmt.c +++ /dev/null @@ -1,50 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2019, Rick Chen <rick@andestech.com> - * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com> - * - * U-Boot syscon driver for Andes's Platform Level Machine Timer (PLMT). - * The PLMT block holds memory-mapped mtime register - * associated with timer tick. - */ - -#include <common.h> -#include <dm.h> -#include <timer.h> -#include <asm/io.h> -#include <linux/err.h> - -/* mtime register */ -#define MTIME_REG(base) ((ulong)(base)) - -static u64 andes_plmt_get_count(struct udevice *dev) -{ - return readq((void __iomem *)MTIME_REG(dev->priv)); -} - -static const struct timer_ops andes_plmt_ops = { - .get_count = andes_plmt_get_count, -}; - -static int andes_plmt_probe(struct udevice *dev) -{ - dev->priv = dev_read_addr_ptr(dev); - if (!dev->priv) - return -EINVAL; - - return timer_timebase_fallback(dev); -} - -static const struct udevice_id andes_plmt_ids[] = { - { .compatible = "riscv,plmt0" }, - { } -}; - -U_BOOT_DRIVER(andes_plmt) = { - .name = "andes_plmt", - .id = UCLASS_TIMER, - .of_match = andes_plmt_ids, - .ops = &andes_plmt_ops, - .probe = andes_plmt_probe, - .flags = DM_FLAG_PRE_RELOC, -}; |