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authorSean Anderson <seanga2@gmail.com>2020-09-14 18:01:57 +0300
committerTom Rini <trini@konsulko.com>2020-10-08 18:42:36 +0300
commit7f0f1806e3a474dc15b6bad806b4afa967447774 (patch)
tree67ae12ff6c548fe4c3f13177a8a4ef9b3ea781b8 /arch
parent5eee93e5b1ae9b2b31db99f774e0f635ad276068 (diff)
downloadu-boot-7f0f1806e3a474dc15b6bad806b4afa967447774.tar.xz
test: pinmux: Add test for pin muxing
This extends the pinctrl-sandbox driver to support pin muxing, and adds a test for that behaviour. The test is done in C and not python (like the existing tests for the pinctrl uclass) because it needs to call pinctrl_select_state. Another option could be to add a command that invokes pinctrl_select_state and then test everything in test/py/tests/test_pinmux.py. The pinctrl-sandbox driver now mimics the way that many pinmux devices work. There are two groups of pins which are muxed together, as well as four pins which are muxed individually. I have tried to test all normal paths. However, very few error cases are explicitly checked for. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sandbox/dts/test.dts45
1 files changed, 38 insertions, 7 deletions
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index cc372806a0..6ea1073c47 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -2,6 +2,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/sandbox-gpio.h>
+#include <dt-bindings/pinctrl/sandbox-pinmux.h>
/ {
model = "sandbox";
@@ -1094,30 +1095,60 @@
pinctrl {
compatible = "sandbox,pinctrl";
- pinctrl-names = "default";
- pinctrl-0 = <&gpios>;
+ pinctrl-names = "default", "alternate";
+ pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
+ pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
- gpios: gpios {
+ pinctrl_gpios: gpios {
gpio0 {
- pins = "GPIO0";
+ pins = "P5";
+ function = "GPIO";
bias-pull-up;
input-disable;
};
gpio1 {
- pins = "GPIO1";
+ pins = "P6";
+ function = "GPIO";
output-high;
drive-open-drain;
};
gpio2 {
- pins = "GPIO2";
+ pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
bias-pull-down;
input-enable;
};
gpio3 {
- pins = "GPIO3";
+ pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
bias-disable;
};
};
+
+ pinctrl_i2c: i2c {
+ groups {
+ groups = "I2C_UART";
+ function = "I2C";
+ };
+
+ pins {
+ pins = "P0", "P1";
+ drive-open-drain;
+ };
+ };
+
+ pinctrl_i2s: i2s {
+ groups = "SPI_I2S";
+ function = "I2S";
+ };
+
+ pinctrl_spi: spi {
+ groups = "SPI_I2S";
+ function = "SPI";
+
+ cs {
+ pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
+ <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
+ };
+ };
};
hwspinlock@0 {