diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2021-06-01 17:40:43 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-06-23 10:48:35 +0300 |
| commit | af04516992cf3e1f70843f372ceee932a9aebd97 (patch) | |
| tree | 0d654c1b853160b64b0c2c583300e4da76fd87a1 /arch | |
| parent | 70fbcdb8254457efbf38b512beb395cbd8412f2e (diff) | |
| download | u-boot-af04516992cf3e1f70843f372ceee932a9aebd97.tar.xz | |
arm64: zynqmp: Remove unused dp_aclk clock
dp_aclk is not used anywhere that's why remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/zynqmp-clk-ccf.dtsi | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 987792e5c5..b27b0aaf7c 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -2,7 +2,7 @@ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2017 - 2020, Xilinx, Inc. + * (C) Copyright 2017 - 2021, Xilinx, Inc. * * Michal Simek <michal.simek@xilinx.com> */ @@ -67,13 +67,6 @@ #clock-cells = <0>; clock-frequency = <27000000>; }; - - dp_aclk: dp_aclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - clock-accuracy = <100>; - }; }; &zynqmp_firmware { |