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authorSamuel Holland <samuel@sholland.org>2020-10-22 05:12:16 +0300
committerJagan Teki <jagan@amarulasolutions.com>2020-10-22 09:13:43 +0300
commite72a6be4fc071930016903638e1e493ab5d3be8a (patch)
treee9f81dae2d026188ec7edc378dfe2219abf9c868 /arch
parent18bd45592cbd87a766450d08169ec574853b50fa (diff)
downloadu-boot-e72a6be4fc071930016903638e1e493ab5d3be8a.tar.xz
sunxi: binman: Add support for including SCP firmware
Allwinner sun50i SoCs contain an OpenRISC 1000 CPU that functions as a System Control Processor, or SCP. ARM Trusted Firmware (ATF) communicates with the SCP over SCPI to implement the PSCI system suspend, shutdown and reset functionality. Currently, SCP firmware is optional; the system will boot and run without it, but system suspend will be unavailable. Since all communication with the SCP is mediated by ATF, the only thing U-Boot needs to do is load the firmware into SRAM. The SCP firmware occupies the last 16KiB of SRAM A2, immediately following ATF. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/sunxi-u-boot.dtsi17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 9f5b103cbb..c77cf7cacf 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -2,8 +2,10 @@
#ifdef CONFIG_MACH_SUN50I_H6
#define BL31_ADDR 0x104000
+#define SCP_ADDR 0x114000
#else
#define BL31_ADDR 0x44000
+#define SCP_ADDR 0x50000
#endif
/ {
@@ -59,6 +61,19 @@
};
};
+ scp {
+ description = "SCP firmware";
+ type = "firmware";
+ arch = "or1k";
+ compression = "none";
+ load = <SCP_ADDR>;
+
+ scp {
+ filename = "scp.bin";
+ missing-msg = "scp-sunxi";
+ };
+ };
+
@fdt-SEQ {
description = "NAME";
type = "flat_dt";
@@ -72,7 +87,7 @@
@config-SEQ {
description = "NAME";
firmware = "atf";
- loadables = "uboot";
+ loadables = "scp", "uboot";
fdt = "fdt-SEQ";
};
};