ppc: Remove xpedite boards

These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove them.  As this includes
the last ARCH_MPC8572 platform, remove that as well.

Cc: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>

6 files changed, 4 insertions, 122 deletions

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index cd7aa95356..876f768e86 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -185,20 +185,6 @@ config TARGET_KMCENT2
 	bool "Support kmcent2"
 	select VENDOR_KM
 
-config TARGET_XPEDITE520X
-	bool "Support xpedite520x"
-	select ARCH_MPC8548
-
-config TARGET_XPEDITE537X
-	bool "Support xpedite537x"
-	select ARCH_MPC8572
-# Use DDR3 controller with DDR2 DIMMs on this board
-	select SYS_FSL_DDRC_GEN3
-
-config TARGET_XPEDITE550X
-	bool "Support xpedite550x"
-	select ARCH_P2020
-
 config TARGET_UCP1020
 	bool "Support uCP1020"
 	select ARCH_P1020
@@ -374,23 +360,6 @@ config ARCH_MPC8560
 	select FSL_LAW
 	select SYS_FSL_HAS_DDR1
 
-config ARCH_MPC8572
-	bool
-	select FSL_LAW
-	select SYS_FSL_ERRATUM_A004508
-	select SYS_FSL_ERRATUM_A005125
-	select SYS_FSL_ERRATUM_DDR_115
-	select SYS_FSL_ERRATUM_DDR111_DDR134
-	select FSL_PCIE_RESET
-	select SYS_FSL_HAS_DDR2
-	select SYS_FSL_HAS_DDR3
-	select SYS_FSL_HAS_SEC
-	select SYS_FSL_SEC_BE
-	select SYS_FSL_SEC_COMPAT_2
-	select SYS_PPC_E500_USE_DEBUG_TLB
-	select FSL_ELBC
-	imply CMD_NAND
-
 config ARCH_P1010
 	bool
 	select FSL_LAW
@@ -865,7 +834,6 @@ config MAX_CPUS
 		     ARCH_T2080
 	default 2 if ARCH_B4420 || \
 		     ARCH_BSC9132 || \
-		     ARCH_MPC8572 || \
 		     ARCH_P1020 || \
 		     ARCH_P1021 || \
 		     ARCH_P1023 || \
@@ -891,7 +859,6 @@ config SYS_CCSRBAR_DEFAULT
 				ARCH_MPC8544	|| \
 				ARCH_MPC8548	|| \
 				ARCH_MPC8560	|| \
-				ARCH_MPC8572	|| \
 				ARCH_P1010	|| \
 				ARCH_P1011	|| \
 				ARCH_P1020	|| \
@@ -1104,7 +1071,6 @@ config SYS_FSL_NUM_LAWS
 			ARCH_BSC9132	|| \
 			ARCH_C29X	|| \
 			ARCH_MPC8536	|| \
-			ARCH_MPC8572	|| \
 			ARCH_P1010	|| \
 			ARCH_P1011	|| \
 			ARCH_P1020	|| \
@@ -1151,8 +1117,7 @@ config SYS_PPC_E500_DEBUG_TLB
 	depends on SYS_PPC_E500_USE_DEBUG_TLB
 	default 0 if	ARCH_MPC8544 || ARCH_MPC8548
 	default 1 if	ARCH_MPC8536
-	default 2 if	ARCH_MPC8572	|| \
-			ARCH_P1011	|| \
+	default 2 if	ARCH_P1011	|| \
 			ARCH_P1020	|| \
 			ARCH_P1021	|| \
 			ARCH_P1024	|| \
@@ -1216,9 +1181,6 @@ source "board/freescale/t208xrdb/Kconfig"
 source "board/freescale/t4rdb/Kconfig"
 source "board/keymile/Kconfig"
 source "board/socrates/Kconfig"
-source "board/xes/xpedite520x/Kconfig"
-source "board/xes/xpedite537x/Kconfig"
-source "board/xes/xpedite550x/Kconfig"
 source "board/Arcturus/ucp1020/Kconfig"
 
 endmenu
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 8cd4b44ec5..bbaae0d845 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -61,7 +61,6 @@ obj-$(CONFIG_ARCH_C29X)	+= c29x_serdes.o
 obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
 obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
 obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
-obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
 obj-$(CONFIG_ARCH_P1010)	+= p1010_serdes.o
 obj-$(CONFIG_ARCH_P1011)	+= p1021_serdes.o
 obj-$(CONFIG_ARCH_P1020)	+= p1021_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
deleted file mode 100644
index 1b4e614918..0000000000
--- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
+++ /dev/null
@@ -1,74 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2010 Freescale Semiconductor, Inc.
- */
-
-#include <config.h>
-#include <common.h>
-#include <log.h>
-#include <asm/io.h>
-#include <asm/immap_85xx.h>
-#include <asm/fsl_serdes.h>
-
-#define SRDS1_MAX_LANES		8
-
-static u32 serdes1_prtcl_map;
-
-static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
-	[0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
-	[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2},
-	[0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
-	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3},
-	[0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
-	[0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
-	[0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
-	[0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
-	[0xf] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
-};
-
-int is_serdes_configured(enum srds_prtcl prtcl)
-{
-	if (!(serdes1_prtcl_map & (1 << NONE)))
-		fsl_serdes_init();
-
-	return (1 << prtcl) & serdes1_prtcl_map;
-}
-
-void fsl_serdes_init(void)
-{
-	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-	u32 pordevsr = in_be32(&gur->pordevsr);
-	u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
-				MPC85xx_PORDEVSR_IO_SEL_SHIFT;
-	int lane;
-
-	if (serdes1_prtcl_map & (1 << NONE))
-		return;
-
-	debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
-
-	if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
-		printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
-		return;
-	}
-
-	for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
-		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
-		serdes1_prtcl_map |= (1 << lane_prtcl);
-	}
-
-	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
-		serdes1_prtcl_map |= (1 << SGMII_TSEC1);
-
-	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
-		serdes1_prtcl_map |= (1 << SGMII_TSEC2);
-
-	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
-		serdes1_prtcl_map |= (1 << SGMII_TSEC3);
-
-	if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
-		serdes1_prtcl_map |= (1 << SGMII_TSEC4);
-
-	/* Set the first bit to indicate serdes has been initialized */
-	serdes1_prtcl_map |= (1 << NONE);
-}
diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig
index 7de42b5f25..1ee87038be 100644
--- a/arch/powerpc/cpu/mpc86xx/Kconfig
+++ b/arch/powerpc/cpu/mpc86xx/Kconfig
@@ -13,10 +13,6 @@ config TARGET_SBC8641D
 	select ARCH_MPC8641
 	select BOARD_EARLY_INIT_F
 
-config TARGET_XPEDITE517X
-	bool "Support xpedite517x"
-	select ARCH_MPC8641
-
 endchoice
 
 config ARCH_MPC8610
@@ -52,6 +48,5 @@ config SYS_FSL_NUM_LAWS
 		If not sure, do not change.
 
 source "board/sbc8641d/Kconfig"
-source "board/xes/xpedite517x/Kconfig"
 
 endmenu
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index 888640df6f..77cdc80fdc 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -84,7 +84,7 @@ enum law_trgt_if {
 #if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132)
 	LAW_TRGT_IF_OCN_DSP = 0x03,
 #else
-#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_ARCH_P2020)
+#if !defined(CONFIG_ARCH_P2020)
 	LAW_TRGT_IF_PCIE_3 = 0x03,
 #endif
 #endif
@@ -120,7 +120,7 @@ enum law_trgt_if {
 #define LAW_TRGT_IF_PCIE_1	LAW_TRGT_IF_PCI
 #endif
 
-#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
+#if defined(CONFIG_ARCH_P2020)
 #define LAW_TRGT_IF_PCIE_3	LAW_TRGT_IF_PCI
 #endif
 #endif /* CONFIG_FSL_CORENET */
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 900b8f43c8..70112c91fc 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2853,7 +2853,7 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET		0x9000
 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET         0xa000
 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET         0x9000
-#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
+#if defined(CONFIG_ARCH_P2020)
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET         0x8000
 #else
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET         0xb000