diff options
author | Stefan Roese <sr@denx.de> | 2014-03-04 18:34:35 +0400 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2014-03-07 19:59:06 +0400 |
commit | 345b77bacabb84a00c7508471ab560b452910240 (patch) | |
tree | ebfd90c103d0129cf16b07912d2a86d2b75bae5d /board/amcc/sequoia/sequoia.c | |
parent | dc116bd6c4b5cb1caf6621f282ac5156d1509bef (diff) | |
download | u-boot-345b77bacabb84a00c7508471ab560b452910240.tar.xz |
ppc4xx: Remove 4xx NAND booting support
As ppc4xx currently only supports the deprecated nand_spl infrastructure
and nobody seems to have time / resources to port this over to the newer
SPL infrastructure, lets remove NAND booting completely.
This should not affect the "normal", non NAND-booting ppc4xx platforms
that are currently supported.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Tested-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Diffstat (limited to 'board/amcc/sequoia/sequoia.c')
-rw-r--r-- | board/amcc/sequoia/sequoia.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index 73c65c56aa..53f9b3419f 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -142,8 +142,7 @@ int misc_init_r(void) gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; gd->bd->bi_flashoffset = 0; -#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) || \ - defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_RAMBOOT) mtdcr(EBC0_CFGADDR, PB3CR); #else mtdcr(EBC0_CFGADDR, PB0CR); @@ -151,8 +150,7 @@ int misc_init_r(void) pbcr = mfdcr(EBC0_CFGDATA); size_val = ffs(gd->bd->bi_flashsize) - 21; pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17); -#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) || \ - defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_RAMBOOT) mtdcr(EBC0_CFGADDR, PB3CR); #else mtdcr(EBC0_CFGADDR, PB0CR); @@ -360,7 +358,7 @@ void board_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev) } #endif -#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_RAMBOOT) /* * On NAND-booting sequoia, we need to patch the chips select numbers * in the dtb (CS0 - NAND, CS3 - NOR) @@ -411,4 +409,4 @@ void ft_board_setup(void *blob, bd_t *bd) return; } } -#endif /* CONFIG_NAND_U_BOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ |