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author | Erik van Luijk <evanluijk@interact.nl> | 2015-08-13 16:43:20 +0300 |
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committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-08-21 16:47:03 +0300 |
commit | c982f6b9bf7815633640d95ed6f0deb55cfdcde5 (patch) | |
tree | 326e11936c417b7cbd5ba1944c4934e1d5020274 /board/atmel/sama5d4ek | |
parent | 6560491fe5acd2f150853efdd5d9bd714a93374c (diff) | |
download | u-boot-c982f6b9bf7815633640d95ed6f0deb55cfdcde5.tar.xz |
arm: at91: pmc: replace the constant with a define in at91_pmc.h
To enable the clocks on the at91 boards a constant (0x4) is used.
This is replaced with a define in at91_pmc.h (1 << 2).
Signed-off-by: Erik van Luijk <evanluijk@interact.nl>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/atmel/sama5d4ek')
-rw-r--r-- | board/atmel/sama5d4ek/sama5d4ek.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index de4291f94a..357b223e1b 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -386,7 +386,7 @@ void mem_init(void) /* enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); |