diff options
| author | Lukas Auer <lukas.auer@aisec.fraunhofer.de> | 2019-08-21 22:14:49 +0300 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2019-08-26 11:07:42 +0300 |
| commit | e456a81935aafcecc8e53a7cd35efe9267781041 (patch) | |
| tree | 2c9bdd38f2a56acfce3580257fecaf8a692651ca /board/emulation | |
| parent | 109f82bea906478807d831978dc680d3ef992f17 (diff) | |
| download | u-boot-e456a81935aafcecc8e53a7cd35efe9267781041.tar.xz | |
riscv: qemu: add SPL configuration
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'board/emulation')
| -rw-r--r-- | board/emulation/qemu-riscv/Kconfig | 10 | ||||
| -rw-r--r-- | board/emulation/qemu-riscv/MAINTAINERS | 2 | ||||
| -rw-r--r-- | board/emulation/qemu-riscv/qemu-riscv.c | 17 |
3 files changed, 29 insertions, 0 deletions
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 6cc7c31dc6..1928d6dda0 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,13 +13,21 @@ config SYS_CONFIG_NAME default "qemu-riscv" config SYS_TEXT_BASE + default 0x81200000 if SPL default 0x80000000 if !RISCV_SMODE default 0x80200000 if RISCV_SMODE && ARCH_RV64I default 0x80400000 if RISCV_SMODE && ARCH_RV32I +config SPL_TEXT_BASE + default 0x80000000 + +config SPL_OPENSBI_LOAD_ADDR + default 0x81000000 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select GENERIC_RISCV + select SUPPORT_SPL imply SYS_NS16550 imply VIRTIO_MMIO imply VIRTIO_NET @@ -43,5 +51,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply CMD_PCI imply E1000 imply NVME + imply SPL_RAM_SUPPORT + imply SPL_RAM_DEVICE endif diff --git a/board/emulation/qemu-riscv/MAINTAINERS b/board/emulation/qemu-riscv/MAINTAINERS index c701c83d77..78969ed6bd 100644 --- a/board/emulation/qemu-riscv/MAINTAINERS +++ b/board/emulation/qemu-riscv/MAINTAINERS @@ -5,5 +5,7 @@ F: board/emulation/qemu-riscv/ F: include/configs/qemu-riscv.h F: configs/qemu-riscv32_defconfig F: configs/qemu-riscv32_smode_defconfig +F: configs/qemu-riscv32_spl_defconfig F: configs/qemu-riscv64_defconfig F: configs/qemu-riscv64_smode_defconfig +F: configs/qemu-riscv64_spl_defconfig diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index 49e304f7eb..37d48d04f2 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -7,6 +7,7 @@ #include <dm.h> #include <env.h> #include <fdtdec.h> +#include <spl.h> #include <virtio_types.h> #include <virtio.h> @@ -88,3 +89,19 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } + +#ifdef CONFIG_SPL +u32 spl_boot_device(void) +{ + /* RISC-V QEMU only supports RAM as SPL boot device */ + return BOOT_DEVICE_RAM; +} +#endif + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* boot using first FIT config */ + return 0; +} +#endif |