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authorSuniel Mahesh <sunil@amarulasolutions.com>2020-02-03 16:50:05 +0300
committerKever Yang <kever.yang@rock-chips.com>2020-02-19 11:45:38 +0300
commit5a6d3d1fbca70d7f528c685292d64c4cd0106aa6 (patch)
tree4c6ce97d7956e7f73dd47d77225686f49a4287ae /board/firefly/roc-pc-rk3399
parent01892d230dd456278cd28c3b8de109202f910238 (diff)
downloadu-boot-5a6d3d1fbca70d7f528c685292d64c4cd0106aa6.tar.xz
board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode
Added support for onboard LED's and push button. When powered board will be in low power mode(yellow LED), on button press, board enters full power mode (red LED) and boots u-boot. Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'board/firefly/roc-pc-rk3399')
-rw-r--r--board/firefly/roc-pc-rk3399/roc-pc-rk3399.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index d47dba8b91..de9185a7ce 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -7,6 +7,10 @@
#include <dm.h>
#include <asm/arch-rockchip/periph.h>
#include <power/regulator.h>
+#include <spl_gpio.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/gpio.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
#ifndef CONFIG_SPL_BUILD
int board_early_init_f(void)
@@ -27,3 +31,31 @@ out:
return 0;
}
#endif
+
+#if defined(CONFIG_TPL_BUILD)
+
+#define PMUGRF_BASE 0xff320000
+#define GPIO0_BASE 0xff720000
+
+int board_early_init_f(void)
+{
+ struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
+ struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+
+ /**
+ * 1. Glow yellow LED, termed as low power
+ * 2. Poll for on board power key press
+ * 3. Once 2 done, off yellow and glow red LED, termed as full power
+ * 4. Continue booting...
+ */
+ spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
+
+ spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
+ while (readl(&gpio0->ext_port) & 0x20);
+
+ spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+ spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
+
+ return 0;
+}
+#endif