diff options
| author | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-06 00:20:26 +0300 |
| commit | 720620e6916ba40b9a173bb07706d2c73f3c23e7 (patch) | |
| tree | b085821f1d1137d80e9bb73f405ea0680db338b9 /board/freescale/corenet_ds/eth_superhydra.c | |
| parent | c86b18074c9d40bfa63cda1068b6dfb810d4377d (diff) | |
| parent | 62b07b5173e3d04fabfac42cf1f4779d021f94ad (diff) | |
| download | u-boot-720620e6916ba40b9a173bb07706d2c73f3c23e7.tar.xz | |
Merge tag 'v2021.01-rc5' into next
Prepare v2021.01-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/freescale/corenet_ds/eth_superhydra.c')
| -rw-r--r-- | board/freescale/corenet_ds/eth_superhydra.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/board/freescale/corenet_ds/eth_superhydra.c b/board/freescale/corenet_ds/eth_superhydra.c index 35daa1e80f..de7b692f3f 100644 --- a/board/freescale/corenet_ds/eth_superhydra.c +++ b/board/freescale/corenet_ds/eth_superhydra.c @@ -317,6 +317,9 @@ void fdt_fixup_board_enet(void *fdt) } break; case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: fdt_status_okay_by_alias(fdt, "hydra_rg"); debug("Enabled MDIO node hydra_rg\n"); break; @@ -353,6 +356,9 @@ void fdt_fixup_board_enet(void *fdt) } break; case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: fdt_status_okay_by_alias(fdt, "hydra_rg"); debug("Enabled MDIO node hydra_rg\n"); break; @@ -557,6 +563,9 @@ int board_eth_init(struct bd_info *bis) miiphy_get_dev_by_name("SUPER_HYDRA_FM1_SGMII_MDIO")); break; case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: /* * FM1 DTSEC5 is routed via EC1 to the first on-board * RGMII port. FM2 DTSEC5 is routed via EC2 to the @@ -704,6 +713,9 @@ int board_eth_init(struct bd_info *bis) break; case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_ID: /* * FM1 DTSEC5 is routed via EC1 to the first on-board * RGMII port. FM2 DTSEC5 is routed via EC2 to the |