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| author | Alison Wang <alison.wang@nxp.com> | 2019-03-06 09:49:14 +0300 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-03-15 09:22:01 +0300 |
| commit | 158097052a6a528408e05d2345ff2ccdbb46036e (patch) | |
| tree | 78453d3d716aef5368b91a620203c0487fe6f378 /board/freescale/ls1021atwr | |
| parent | ba7eadd8e107202ab90d0b2937044b6dcba4b7ae (diff) | |
| download | u-boot-158097052a6a528408e05d2345ff2ccdbb46036e.tar.xz | |
armv7: ls102xa: Add workaround for DDR erratum A-008850
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'board/freescale/ls1021atwr')
| -rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index beb82cebb6..01ba1bc962 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -222,6 +222,8 @@ int dram_init(void) ddrmc_init(); #endif + erratum_a008850_post(); + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); #if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD) |