diff options
| author | Biwen Li <biwen.li@nxp.com> | 2019-12-31 10:33:44 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-02-04 13:50:25 +0300 |
| commit | 9ebde8849a37beff5eccb462a991e05b07f8a360 (patch) | |
| tree | 037e178c5c495f7e72c83c873dee5b857b7cfa0e /board/freescale/ls1021atwr | |
| parent | a0affb367ad638e1e6f51ed3678d3daad5724a40 (diff) | |
| download | u-boot-9ebde8849a37beff5eccb462a991e05b07f8a360.tar.xz | |
dm: arm: ls1021a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale/ls1021atwr')
| -rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 497dce5f0f..d1ff7b8ba6 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #include <common.h> @@ -447,14 +448,37 @@ void board_init_f(ulong dummy) /* program the regulator (MC34VR500) to support deep sleep */ void ls1twr_program_regulator(void) { - unsigned int i2c_bus; u8 i2c_device_id; #define LS1TWR_I2C_BUS_MC34VR500 1 #define MC34VR500_ADDR 0x8 #define MC34VR500_DEVICEID 0x4 #define MC34VR500_DEVICEID_MASK 0x0f +#ifdef CONFIG_DM_I2C + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(LS1TWR_I2C_BUS_MC34VR500, MC34VR500_ADDR, + 1, &dev); + if (ret) { + printf("%s: Cannot find udev for a bus %d\n", __func__, + LS1TWR_I2C_BUS_MC34VR500); + return; + } + i2c_device_id = dm_i2c_reg_read(dev, 0x0) & + MC34VR500_DEVICEID_MASK; + if (i2c_device_id != MC34VR500_DEVICEID) { + printf("The regulator (MC34VR500) does not exist. The device does not support deep sleep.\n"); + return; + } + dm_i2c_reg_write(dev, 0x31, 0x4); + dm_i2c_reg_write(dev, 0x4d, 0x4); + dm_i2c_reg_write(dev, 0x6d, 0x38); + dm_i2c_reg_write(dev, 0x6f, 0x37); + dm_i2c_reg_write(dev, 0x71, 0x30); +#else + unsigned int i2c_bus; i2c_bus = i2c_get_bus_num(); i2c_set_bus_num(LS1TWR_I2C_BUS_MC34VR500); i2c_device_id = i2c_reg_read(MC34VR500_ADDR, 0x0) & @@ -471,6 +495,7 @@ void ls1twr_program_regulator(void) i2c_reg_write(MC34VR500_ADDR, 0x71, 0x30); i2c_set_bus_num(i2c_bus); +#endif } #endif |