summaryrefslogtreecommitdiff
path: root/board/freescale/ls1088a/ls1088a_qixis.h
diff options
context:
space:
mode:
authorChuanhua Han <chuanhua.han@nxp.com>2019-08-01 11:36:57 +0300
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2019-08-22 06:37:36 +0300
commit1748990ab2a0e995beeed6b3856335f579bb77d9 (patch)
tree814428e029da8ef7f4487836b9d765ffe5445b26 /board/freescale/ls1088a/ls1088a_qixis.h
parenta02a9421f4ac96e7a3f441d2388e9945a9d84e05 (diff)
downloadu-boot-1748990ab2a0e995beeed6b3856335f579bb77d9.tar.xz
armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used to control SPI and other IP signal routing. USBOSC: 0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz. SPI devices are unusable in this mode. 1= SPI_CLK used as SPI clock. SPI devices are usable in this mode. USB block is clocked from internal sources SPR[3:2]: SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]): 00= SDHC/eMMC 8-bit 01= SD Card Rev 2.0/3.0 10= SPI on-board memory 11= TDM Riser / SPI off-board connector. The default value is 00 if an SDCard/eMMC card is selected as the boot device. SPR[1:0]: SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]): 00= SDHC Sync loop 01= TDM Riser / SPI off-board connector. 10= SPI on-board memory. 11= SPI off-board connector. By default, the SPI feature is not available, so we need to configure the above register fields to select the route to the SPI feature. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'board/freescale/ls1088a/ls1088a_qixis.h')
-rw-r--r--board/freescale/ls1088a/ls1088a_qixis.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/freescale/ls1088a/ls1088a_qixis.h b/board/freescale/ls1088a/ls1088a_qixis.h
index c58852617f..e3502eb1d1 100644
--- a/board/freescale/ls1088a/ls1088a_qixis.h
+++ b/board/freescale/ls1088a/ls1088a_qixis.h
@@ -41,4 +41,15 @@
#define BRDCFG5_SPISDHC_MASK 0x0C
#define BRDCFG5_FORCE_SD 0x08
+/* Definitions of QIXIS Registers for LS1088AQDS */
+
+/* BRDCFG4 */
+#define BRDCFG4_USBOSC_MASK 0x01
+#define BRDCFG4_SPI 0x01
+
+/* BRDCFG5 */
+#define BRDCFG5_SPR_MASK 0x0f
+#define BRDCFG5_SPI_ON_BOARD 0x0a
+#define BRDCFG5_SPI_OFF_BOARD 0x0f
+
#endif