diff options
author | Igor Opaniuk <igor.opaniuk@foundries.io> | 2021-02-09 14:52:45 +0300 |
---|---|---|
committer | Heiko Schocher <hs@denx.de> | 2021-02-21 08:08:00 +0300 |
commit | 2147a16983d17bcb0438607aa7760494afc27014 (patch) | |
tree | 153470783919253c3a9bbcbc0e34b38c62f138f1 /board/freescale/ls1088a | |
parent | a907dce88e462251d96be9cdd72900543e4798df (diff) | |
download | u-boot-2147a16983d17bcb0438607aa7760494afc27014.tar.xz |
dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.
CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.
All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale/ls1088a')
-rw-r--r-- | board/freescale/ls1088a/eth_ls1088aqds.c | 16 | ||||
-rw-r--r-- | board/freescale/ls1088a/ls1088a.c | 60 |
2 files changed, 38 insertions, 38 deletions
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c index bf4f57e6f8..140733de6a 100644 --- a/board/freescale/ls1088a/eth_ls1088aqds.c +++ b/board/freescale/ls1088a/eth_ls1088aqds.c @@ -114,12 +114,12 @@ static void sgmii_configure_repeater(int dpmac) {0x18, NULL}, {0x23, ®_val[3]}, {0x2d, ®_val[4]}, {4, ®_val[5]}, }; -#ifdef CONFIG_DM_I2C +#if CONFIG_IS_ENABLED(DM_I2C) struct udevice *udev; #endif /* Set I2c to Slot 1 */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(0x77, 0, 0, &a, 1); #else ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev); @@ -173,7 +173,7 @@ static void sgmii_configure_repeater(int dpmac) return; } -#ifdef CONFIG_DM_I2C +#if CONFIG_IS_ENABLED(DM_I2C) i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev); #endif @@ -184,7 +184,7 @@ static void sgmii_configure_repeater(int dpmac) reg_pair[5].val = &ch_b_eq[i]; reg_pair[6].val = &ch_b_ctl2[j]; for (k = 0; k < 10; k++) { -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(i2c_phy_addr, reg_pair[k].addr, 1, reg_pair[k].val, 1); @@ -257,12 +257,12 @@ static void qsgmii_configure_repeater(int dpmac) const char *dev = mdio_names[EMI1_SLOT1]; int ret = 0; unsigned short value; -#ifdef CONFIG_DM_I2C +#if CONFIG_IS_ENABLED(DM_I2C) struct udevice *udev; #endif /* Set I2c to Slot 1 */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(0x77, 0, 0, &a, 1); #else ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev); @@ -304,7 +304,7 @@ static void qsgmii_configure_repeater(int dpmac) return; } -#ifdef CONFIG_DM_I2C +#if CONFIG_IS_ENABLED(DM_I2C) i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev); #endif @@ -316,7 +316,7 @@ static void qsgmii_configure_repeater(int dpmac) reg_pair[6].val = &ch_b_ctl2[j]; for (k = 0; k < 10; k++) { -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(i2c_phy_addr, reg_pair[k].addr, 1, reg_pair[k].val, 1); diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 2ba6a3990d..e76ea01914 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -379,7 +379,7 @@ int select_i2c_ch_pca9547(u8 ch) { int ret; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); #else struct udevice *dev; @@ -406,7 +406,7 @@ void board_retimer_init(void) /* Access to Control/Shared register */ reg = 0x0; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1); #else struct udevice *dev; @@ -416,7 +416,7 @@ void board_retimer_init(void) #endif /* Read device revision and ID */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_read(I2C_RETIMER_ADDR, 1, 1, ®, 1); #else dm_i2c_read(dev, 1, ®, 1); @@ -425,20 +425,20 @@ void board_retimer_init(void) /* Enable Broadcast. All writes target all channel register sets */ reg = 0x0c; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0xff, 1, ®, 1); #else dm_i2c_write(dev, 0xff, ®, 1); #endif /* Reset Channel Registers */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_read(I2C_RETIMER_ADDR, 0, 1, ®, 1); #else dm_i2c_read(dev, 0, ®, 1); #endif reg |= 0x4; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0, 1, ®, 1); #else dm_i2c_write(dev, 0, ®, 1); @@ -446,45 +446,45 @@ void board_retimer_init(void) /* Set data rate as 10.3125 Gbps */ reg = 0x90; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0x60, 1, ®, 1); #else dm_i2c_write(dev, 0x60, ®, 1); #endif reg = 0xb3; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0x61, 1, ®, 1); #else dm_i2c_write(dev, 0x61, ®, 1); #endif reg = 0x90; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0x62, 1, ®, 1); #else dm_i2c_write(dev, 0x62, ®, 1); #endif reg = 0xb3; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0x63, 1, ®, 1); #else dm_i2c_write(dev, 0x63, ®, 1); #endif reg = 0xcd; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0x64, 1, ®, 1); #else dm_i2c_write(dev, 0x64, ®, 1); #endif /* Select VCO Divider to full rate (000) */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_read(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1); #else dm_i2c_read(dev, 0x2F, ®, 1); #endif reg &= 0x0f; reg |= 0x70; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR, 0x2F, 1, ®, 1); #else dm_i2c_write(dev, 0x2F, ®, 1); @@ -496,7 +496,7 @@ void board_retimer_init(void) /* Access to Control/Shared register */ reg = 0x0; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1); #else i2c_get_chip_for_busnum(0, I2C_RETIMER_ADDR2, 1, &dev); @@ -504,7 +504,7 @@ void board_retimer_init(void) #endif /* Read device revision and ID */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_read(I2C_RETIMER_ADDR2, 1, 1, ®, 1); #else dm_i2c_read(dev, 1, ®, 1); @@ -513,20 +513,20 @@ void board_retimer_init(void) /* Enable Broadcast. All writes target all channel register sets */ reg = 0x0c; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0xff, 1, ®, 1); #else dm_i2c_write(dev, 0xff, ®, 1); #endif /* Reset Channel Registers */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_read(I2C_RETIMER_ADDR2, 0, 1, ®, 1); #else dm_i2c_read(dev, 0, ®, 1); #endif reg |= 0x4; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0, 1, ®, 1); #else dm_i2c_write(dev, 0, ®, 1); @@ -534,45 +534,45 @@ void board_retimer_init(void) /* Set data rate as 10.3125 Gbps */ reg = 0x90; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0x60, 1, ®, 1); #else dm_i2c_write(dev, 0x60, ®, 1); #endif reg = 0xb3; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0x61, 1, ®, 1); #else dm_i2c_write(dev, 0x61, ®, 1); #endif reg = 0x90; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0x62, 1, ®, 1); #else dm_i2c_write(dev, 0x62, ®, 1); #endif reg = 0xb3; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0x63, 1, ®, 1); #else dm_i2c_write(dev, 0x63, ®, 1); #endif reg = 0xcd; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0x64, 1, ®, 1); #else dm_i2c_write(dev, 0x64, ®, 1); #endif /* Select VCO Divider to full rate (000) */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_read(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1); #else dm_i2c_read(dev, 0x2F, ®, 1); #endif reg &= 0x0f; reg |= 0x70; -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) i2c_write(I2C_RETIMER_ADDR2, 0x2F, 1, ®, 1); #else dm_i2c_write(dev, 0x2F, ®, 1); @@ -640,7 +640,7 @@ int get_serdes_volt(void) u8 chan = PWM_CHANNEL0; /* Select the PAGE 0 using PMBus commands PAGE for VDD */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(I2C_SVDD_MONITOR_ADDR, PMBUS_CMD_PAGE, 1, &chan, 1); #else @@ -658,7 +658,7 @@ int get_serdes_volt(void) } /* Read the output voltage using PMBus command READ_VOUT */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_read(I2C_SVDD_MONITOR_ADDR, PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2); #else @@ -679,7 +679,7 @@ int set_serdes_volt(int svdd) svdd & 0xFF, (svdd & 0xFF00) >> 8}; /* Write the desired voltage code to the SVDD regulator */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(I2C_SVDD_MONITOR_ADDR, PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5); #else @@ -720,7 +720,7 @@ int set_serdes_volt(int svdd) printf("SVDD changing of RDB\n"); /* Read the BRDCFG54 via CLPD */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_read(CONFIG_SYS_I2C_FPGA_ADDR, QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1); #else @@ -740,7 +740,7 @@ int set_serdes_volt(int svdd) brdcfg4 = brdcfg4 | 0x08; /* Write to the BRDCFG4 */ -#ifndef CONFIG_DM_I2C +#if !CONFIG_IS_ENABLED(DM_I2C) ret = i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, QIXIS_BRDCFG4_OFFSET, 1, (void *)&brdcfg4, 1); #else |