arm: dts: ls1088aqds: add CONFIG_MULTI_DTB_FIT support

Add support for selecting the appropriate DTS file depending on the
SERDES protocol used. The fsl-ls2088a-qds DTS will be used by default if
there isn't a DTS file specifically made for the current SERDES
protocol.

This patch adds support for the on-board ports (DPMAC 1,2 and 4,5) found
on the SERDES protocols 21(0x15) and 29(0x1d) for SD#1.

On the LS1088AQDS board EMDIO1 is used with two onboard RGMII PHYs
(Realtek RTL8211FD-CG), as well as 2 input/output connectors for
mezzanine cards. Configuration signals from the Qixis FPGA control the
routing of the external MDIOs.

Register 0x54 of the Qixis FPGA controls the routing of the EMDIO1 one
of the 2 IO slots. As a consequence, a new node is added to
describe register 0x54 as a MDIO mux controlled with child nodes
describing all the IO slots as MDIO buses.

Also, in case CONFIG_DM_ETH and CONFIG_MULTI_DTB_FIT are enabled
implement the board_fit_config_name_match() function in order to choose
the appropriate DTS.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

1 files changed, 87 insertions, 0 deletions

diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index 54ef75347f..c0bcf71299 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -742,3 +742,90 @@ void reset_phy(void)
 	mc_env_boot();
 }
 #endif /* CONFIG_RESET_PHY_R */
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+	u8 serdes_block;
+	u32 serdes_protocol;
+	bool dts_needed;
+} supported_protocols[] = {
+	/* Serdes block #1 */
+	{1, 21, true},
+	{1, 29, true},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol)
+			return true;
+	}
+
+	return false;
+}
+
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol) {
+			if (serdes_conf.dts_needed == true)
+				sprintf(str, "%u", protocol);
+			else
+				sprintf(str, "x");
+			return;
+		}
+	}
+}
+
+int board_fit_config_name_match(const char *name)
+{
+	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	char expected_dts[100];
+	char srds_s1_str[2];
+	u32 srds_s1, cfg;
+
+	cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) &
+		      FSL_CHASSIS3_SRDS1_PRTCL_MASK;
+	cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT;
+	srds_s1 = serdes_get_number(FSL_SRDS_1, cfg);
+
+	/* Check for supported protocols. The default DTS will be used
+	 * in this case
+	 */
+	if (!protocol_supported(1, srds_s1))
+		return -1;
+
+	get_str_protocol(1, srds_s1, srds_s1_str);
+
+	sprintf(expected_dts, "fsl-ls1088a-qds-%s-x", srds_s1_str);
+
+	if (!strcmp(name, expected_dts))
+		return 0;
+
+	return -1;
+}
+#endif