diff options
| author | York Sun <york.sun@nxp.com> | 2017-03-06 20:02:28 +0300 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-03-14 18:44:03 +0300 |
| commit | 36cc0de0b919c0e185739142742e0a76a7c5c30a (patch) | |
| tree | 23c4bf83f6b7546e45df69ebfc1161549fbf3284 /board/freescale/ls2080ardb/ls2080ardb.c | |
| parent | 426337455e06c2d05c40f48e488b95a12e4aa056 (diff) | |
| download | u-boot-36cc0de0b919c0e185739142742e0a76a7c5c30a.tar.xz | |
armv8: layerscape: Rewrite memory reservation
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure memory is
carved out first. DDR bank size is reduced. Reserved memory is then
allocated on the top of available memory. U-Boot still has access
to reserved memory as data transferring is needed. Device tree is
fixed with reduced memory size to hide the reserved memory from OS.
The same region is reserved for efi_loader.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls2080ardb/ls2080ardb.c')
| -rw-r--r-- | board/freescale/ls2080ardb/ls2080ardb.c | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 02954ef6d7..7a4c6a3a5c 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -202,14 +202,6 @@ int misc_init_r(void) if (adjust_vdd(0)) printf("Warning: Adjusting core voltage failed.\n"); -#if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD) - if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { - efi_add_memory_map(gd->bd->bi_dram[2].start, - gd->bd->bi_dram[2].size >> EFI_PAGE_SHIFT, - EFI_RESERVED_MEMORY_TYPE, false); - } -#endif - return 0; } @@ -286,6 +278,16 @@ int ft_board_setup(void *blob, bd_t *bd) base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size; +#ifdef CONFIG_RESV_RAM + /* reduce size if reserved memory is within this bank */ + if (gd->arch.resv_ram >= base[0] && + gd->arch.resv_ram < base[0] + size[0]) + size[0] = gd->arch.resv_ram - base[0]; + else if (gd->arch.resv_ram >= base[1] && + gd->arch.resv_ram < base[1] + size[1]) + size[1] = gd->arch.resv_ram - base[1]; +#endif + fdt_fixup_memory_banks(blob, base, size, 2); fsl_fdt_fixup_dr_usb(blob, bd); |