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| author | Udit Agarwal <udit.agarwal@nxp.com> | 2019-11-07 19:11:39 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2019-11-08 14:02:08 +0300 |
| commit | bef18454044e62800ece687b8d50ddd853117660 (patch) | |
| tree | a8d95bf9cea72beebe92a497bfb4be5bfe0cc5e1 /board/freescale/t104xrdb | |
| parent | 5536c3c9d0d10c1a4e440e71eac389df3a3dbfa7 (diff) | |
| download | u-boot-bef18454044e62800ece687b8d50ddd853117660.tar.xz | |
freescale/powerpc: Rename the config CONFIG_SECURE_BOOT name
Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid
conflicts with UEFI secure boot.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale/t104xrdb')
| -rw-r--r-- | board/freescale/t104xrdb/tlb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/t104xrdb/tlb.c b/board/freescale/t104xrdb/tlb.c index 6511c04f31..9dcba7933f 100644 --- a/board/freescale/t104xrdb/tlb.c +++ b/board/freescale/t104xrdb/tlb.c @@ -28,7 +28,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 1 */ /* *I*** - Covers boot page */ #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) && \ - !defined(CONFIG_SECURE_BOOT) + !defined(CONFIG_NXP_ESBC) /* * *I*G - L3SRAM. When L3 is used as 256K SRAM, the address of the * SRAM is at 0xfffc0000, it covered the 0xfffff000. @@ -37,7 +37,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_256K, 1), -#elif defined(CONFIG_SECURE_BOOT) && defined(CONFIG_SPL_BUILD) +#elif defined(CONFIG_NXP_ESBC) && defined(CONFIG_SPL_BUILD) /* * *I*G - L3SRAM. When L3 is used as 256K SRAM, in case of Secure Boot * the physical address of the SRAM is at 0xbffc0000, |