ppc: Remove MPC832XEMDS boards

These boards have not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM.  Remove them.

Signed-off-by: Tom Rini <trini@konsulko.com>

7 files changed, 0 insertions, 504 deletions

diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c
index 596cd0018c..162c8a954f 100644
--- a/board/freescale/common/pq-mds-pib.c
+++ b/board/freescale/common/pq-mds-pib.c
@@ -36,11 +36,7 @@ int pib_init(void)
 	i2c_write(0x26, 0x6, 1, &val8, 1);
 	val8 = 0x34;
 	i2c_write(0x26, 0x7, 1, &val8, 1);
-#if defined(CONFIG_TARGET_MPC832XEMDS)
-	val8 = 0xf9;            /* PMC2, PMC3 slot to PCI bus */
-#else
 	val8 = 0xf3;		/* PMC1, PMC2, PMC3 slot to PCI bus */
-#endif
 	i2c_write(0x26, 0x2, 1, &val8, 1);
 	val8 = 0xff;
 	i2c_write(0x26, 0x3, 1, &val8, 1);
@@ -55,34 +51,9 @@ int pib_init(void)
 
 	eieio();
 
-#if defined(CONFIG_TARGET_MPC832XEMDS)
-	printf("PCI 32bit bus on PMC2 &PMC3\n");
-#else
 	printf("PCI 32bit bus on PMC1 & PMC2 &PMC3\n");
 #endif
-#endif
-
-#if defined(CONFIG_PQ_MDS_PIB_ATM)
-#if defined(CONFIG_TARGET_MPC832XEMDS)
-	val8 = 0;
-	i2c_write(0x26, 0x7, 1, &val8, 1);
-	val8 = 0xf7;
-	i2c_write(0x26, 0x3, 1, &val8, 1);
-
-	val8 = 0;
-	i2c_write(0x21, 0x6, 1, &val8, 1);
-	i2c_write(0x21, 0x7, 1, &val8, 1);
-
-	val8 = 0xdf;
-	i2c_write(0x21, 0x2, 1, &val8, 1);
-	val8 = 0xef;
-	i2c_write(0x21, 0x3, 1, &val8, 1);
 
-	eieio();
-
-	printf("QOC3 ATM card on PMC1\n");
-#endif
-#endif
 	/* Reset to original I2C bus */
 	i2c_set_bus_num(orig_i2c_bus);
 	return 0;
diff --git a/board/freescale/mpc832xemds/Kconfig b/board/freescale/mpc832xemds/Kconfig
deleted file mode 100644
index e4cfa15a6f..0000000000
--- a/board/freescale/mpc832xemds/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_MPC832XEMDS
-
-config SYS_BOARD
-	default "mpc832xemds"
-
-config SYS_VENDOR
-	default "freescale"
-
-config SYS_CONFIG_NAME
-	default "MPC832XEMDS"
-
-endif
diff --git a/board/freescale/mpc832xemds/MAINTAINERS b/board/freescale/mpc832xemds/MAINTAINERS
deleted file mode 100644
index 232658a203..0000000000
--- a/board/freescale/mpc832xemds/MAINTAINERS
+++ /dev/null
@@ -1,10 +0,0 @@
-MPC832XEMDS BOARD
-#M:	Dave Liu <daveliu@freescale.com>
-S:	Orphan (since 2018-05)
-F:	board/freescale/mpc832xemds/
-F:	include/configs/MPC832XEMDS.h
-F:	configs/MPC832XEMDS_defconfig
-F:	configs/MPC832XEMDS_ATM_defconfig
-F:	configs/MPC832XEMDS_HOST_33_defconfig
-F:	configs/MPC832XEMDS_HOST_66_defconfig
-F:	configs/MPC832XEMDS_SLAVE_defconfig
diff --git a/board/freescale/mpc832xemds/Makefile b/board/freescale/mpc832xemds/Makefile
deleted file mode 100644
index b1551bf478..0000000000
--- a/board/freescale/mpc832xemds/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-y += mpc832xemds.o
-obj-$(CONFIG_PCI) += pci.o
diff --git a/board/freescale/mpc832xemds/README b/board/freescale/mpc832xemds/README
deleted file mode 100644
index d141cd33e7..0000000000
--- a/board/freescale/mpc832xemds/README
+++ /dev/null
@@ -1,128 +0,0 @@
-Freescale MPC832XEMDS Board
------------------------------------------
-1. Board Switches and Jumpers
-1.0 There are five Dual-In-Line Packages(DIP) Switches on MPC832XE SYS board
-	For some reason, the HW designers describe the switch settings
-	in terms of 0 and 1, and then map that to physical switches where
-	the label "On" refers to logic 0 and "Off" is logic 1.
-
-	Switch bits are numbered 1 through, like, 4 6 8 or 10, but the
-	bits may contribute to signals that are numbered based at 0,
-	and some of those signals may be high-bit-number-0 too.  Heed
-	well the names and labels and do not get confused.
-
-		"Off" == 1
-		"On"  == 0
-
-	SW3 is switch 18 as silk-screened onto the board.
-	SW4[8] is the bit labeled 8 on Switch 4.
-	SW5[1:6] refers to bits labeled 1 through 6 in order on switch 5.
-	SW6[7:1] refers to bits labeled 7 through 1 in order on switch 6.
-	SW7[1:8]= 0000_0001 refers to bits labeled 1 through 6 is set as "On"
-		and bits labeled 8 is set as "Off".
-
-1.1 For the MPC832XEMDS PROTO Board
-
-	First, make sure the board default setting is consistent with the document
-		 shipped with your board. Then apply the following setting:
-	SW3[1-8]= 0000_1000  (core PLL setting, core enable)
-	SW4[1-8]= 0001_0010  (Flash boot on local bus, system PLL setting)
-	SW5[1-8]= 0010_0110  (Boot from high end)
-	SW6[1-8]= 0011_0100  (Flash boot on 16 bit local bus)
-	SW7[1-8]= 1000_0011  (QE PLL setting)
-
-	ENET3/4 MII mode settings:
-	J1 1-2 (ETH3_TXER)
-	J2 2-3 (MII mode)
-	J3 2-3 (MII mode)
-	J4 2-3 (ADSL clockOscillator)
-	J5 1-2 (ETH4_TXER)
-	J6 2-3 (ClockOscillator)
-	JP1 removed (don't force PORESET)
-	JP2 mounted (ETH4/2 MII)
-	JP3 mounted (ETH3 MII)
-	JP4 mounted (HRCW from BCSR)
-
-	ENET3/4 RMII mode settings:
-	J1 1-2 (ETH3_TXER)
-	J2 1-2 (RMII mode)
-	J3 1-2 (RMII mode)
-	J4 2-3 (ADSL clockOscillator)
-	J5 1-2 (ETH4_TXER)
-	J6 2-3 (ClockOscillator)
-	JP1 removed (don't force PORESET)
-	JP2 removed (ETH4/2 RMII)
-	JP3 removed (ETH3 RMII)
-	JP4 removed (HRCW from FLASH)
-
-	on board Oscillator: 66M
-
-
-2. Memory Map
-
-2.1 The memory map should look pretty much like this:
-
-	0x0000_0000	0x7fff_ffff	DDR			2G
-	0x8000_0000	0x8fff_ffff	PCI MEM prefetch	256M
-	0x9000_0000	0x9fff_ffff	PCI MEM non-prefetch	256M
-	0xc000_0000	0xdfff_ffff	Empty			512M
-	0xe000_0000	0xe01f_ffff	Int Mem Reg Space	2M
-	0xe020_0000	0xe02f_ffff	Empty			1M
-	0xe030_0000	0xe03f_ffff	PCI IO			1M
-	0xe040_0000	0xefff_ffff	Empty			252M
-	0xf400_0000	0xf7ff_ffff	Empty			64M
-	0xf800_0000	0xf800_7fff	BCSR on CS1		32K
-	0xf800_8000	0xf800_ffff	PIB CS2			32K
-	0xf801_0000	0xf801_7fff	PIB CS3			32K
-	0xfe00_0000	0xfeff_ffff	FLASH on CS0		16M
-
-
-3. Definitions
-
-3.1 Explanation of NEW definitions in:
-
-	include/configs/MPC832XEPB.h
-
-    CONFIG_MPC83xx	MPC83xx family for MPC8349, MPC8360 and MPC832x
-    CONFIG_MPC832x	MPC832x specific
-    CONFIG_MPC832XEMDS	MPC832XEMDS board specific
-
-4. Compilation
-
-	Assuming you're using BASH shell:
-
-		export CROSS_COMPILE=your-cross-compile-prefix
-		cd u-boot
-		make distclean
-		make MPC832XEMDS_config
-		make
-
-	MPC832x support PCI 33MHz and PCI 66MHz, to make U-Boot support PCI:
-
-		1)Make sure the DIP SW support PCI mode as described in Section 1.1.
-
-		2)To Make U-Boot image support PCI 33MHz, use
-			Make MPC832XEMDS_HOST_33_config
-
-		3)To Make U-Boot image support PCI 66MHz, use
-			Make MPC832XEMDS_HOST_66M_config
-
-5. Downloading and Flashing Images
-
-5.0 Download over network:
-
-	tftp 10000 u-boot.bin
-
-5.1 Reflash U-Boot Image using U-Boot
-
-	tftp 20000 u-boot.bin
-	protect off fe000000 fe0fffff
-	erase fe000000 fe0fffff
-	cp.b 20000 fe000000 xxxx
-
-You have to supply the correct byte count with 'xxxx' from the TFTP result log.
-Maybe 3ffff will work too, that corresponds to the erased sectors.
-
-
-6. Notes
-	1) The console baudrate for MPC832XEMDS is 115200bps.
diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c
deleted file mode 100644
index f34758a947..0000000000
--- a/board/freescale/mpc832xemds/mpc832xemds.c
+++ /dev/null
@@ -1,173 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- *
- * Dave Liu <daveliu@freescale.com>
- */
-
-#include <common.h>
-#include <fdt_support.h>
-#include <init.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <command.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
-#include <asm/global_data.h>
-#include <asm/mmu.h>
-#if defined(CONFIG_OF_LIBFDT)
-#include <linux/libfdt.h>
-#endif
-#if defined(CONFIG_PQ_MDS_PIB)
-#include "../common/pq-mds-pib.h"
-#endif
-#include <linux/delay.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const qe_iop_conf_t qe_iop_conf_tab[] = {
-	/* ETH3 */
-	{1,  0, 1, 0, 1}, /* TxD0 */
-	{1,  1, 1, 0, 1}, /* TxD1 */
-	{1,  2, 1, 0, 1}, /* TxD2 */
-	{1,  3, 1, 0, 1}, /* TxD3 */
-	{1,  9, 1, 0, 1}, /* TxER */
-	{1, 12, 1, 0, 1}, /* TxEN */
-	{3, 24, 2, 0, 1}, /* TxCLK->CLK10 */
-
-	{1,  4, 2, 0, 1}, /* RxD0 */
-	{1,  5, 2, 0, 1}, /* RxD1 */
-	{1,  6, 2, 0, 1}, /* RxD2 */
-	{1,  7, 2, 0, 1}, /* RxD3 */
-	{1,  8, 2, 0, 1}, /* RxER */
-	{1, 10, 2, 0, 1}, /* RxDV */
-	{0, 13, 2, 0, 1}, /* RxCLK->CLK9 */
-	{1, 11, 2, 0, 1}, /* COL */
-	{1, 13, 2, 0, 1}, /* CRS */
-
-	/* ETH4 */
-	{1, 18, 1, 0, 1}, /* TxD0 */
-	{1, 19, 1, 0, 1}, /* TxD1 */
-	{1, 20, 1, 0, 1}, /* TxD2 */
-	{1, 21, 1, 0, 1}, /* TxD3 */
-	{1, 27, 1, 0, 1}, /* TxER */
-	{1, 30, 1, 0, 1}, /* TxEN */
-	{3,  6, 2, 0, 1}, /* TxCLK->CLK8 */
-
-	{1, 22, 2, 0, 1}, /* RxD0 */
-	{1, 23, 2, 0, 1}, /* RxD1 */
-	{1, 24, 2, 0, 1}, /* RxD2 */
-	{1, 25, 2, 0, 1}, /* RxD3 */
-	{1, 26, 1, 0, 1}, /* RxER */
-	{1, 28, 2, 0, 1}, /* Rx_DV */
-	{3, 31, 2, 0, 1}, /* RxCLK->CLK7 */
-	{1, 29, 2, 0, 1}, /* COL */
-	{1, 31, 2, 0, 1}, /* CRS */
-
-	{3,  4, 3, 0, 2}, /* MDIO */
-	{3,  5, 1, 0, 2}, /* MDC */
-
-	{0,  0, 0, 0, QE_IOP_TAB_END}, /* END of table */
-};
-
-int board_early_init_f(void)
-{
-	volatile u8 *bcsr = (volatile u8 *)CONFIG_SYS_BCSR;
-
-	/* Enable flash write */
-	bcsr[9] &= ~0x08;
-
-	return 0;
-}
-
-int board_early_init_r(void)
-{
-#ifdef CONFIG_PQ_MDS_PIB
-	pib_init();
-#endif
-	return 0;
-}
-
-int fixed_sdram(void);
-
-int dram_init(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 msize = 0;
-
-	if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
-		return -ENXIO;
-
-	/* DDR SDRAM - Main SODIMM */
-	im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & LAWBAR_BAR;
-
-	msize = fixed_sdram();
-
-	/* set total bus SDRAM size(bytes)  -- DDR */
-	gd->ram_size = msize * 1024 * 1024;
-
-	return 0;
-}
-
-/*************************************************************************
- *  fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
-	volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-	u32 msize = 0;
-	u32 ddr_size;
-	u32 ddr_size_log2;
-
-	msize = CONFIG_SYS_DDR_SIZE;
-	for (ddr_size = msize << 20, ddr_size_log2 = 0;
-	     (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
-		if (ddr_size & 1) {
-			return -1;
-		}
-	}
-	im->sysconf.ddrlaw[0].ar =
-	    LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-#if (CONFIG_SYS_DDR_SIZE != 128)
-#warning Currenly any ddr size other than 128 is not supported
-#endif
-	im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
-	im->ddr.csbnds[0].csbnds = CONFIG_SYS_DDR_CS0_BNDS;
-	im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
-	im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
-	im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
-	im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
-	im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
-	im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
-	im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
-	im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
-	im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
-	im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
-	__asm__ __volatile__ ("sync");
-	udelay(200);
-
-	im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-	__asm__ __volatile__ ("sync");
-	return msize;
-}
-
-int checkboard(void)
-{
-	puts("Board: Freescale MPC832XEMDS\n");
-	return 0;
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
-	ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI
-	ft_pci_setup(blob, bd);
-#endif
-
-	return 0;
-}
-#endif
diff --git a/board/freescale/mpc832xemds/pci.c b/board/freescale/mpc832xemds/pci.c
deleted file mode 100644
index 944108f631..0000000000
--- a/board/freescale/mpc832xemds/pci.c
+++ /dev/null
@@ -1,145 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
- */
-
-/*
- * PCI Configuration space access support for MPC83xx PCI Bridge
- */
-#include <init.h>
-#include <asm/mmu.h>
-#include <asm/io.h>
-#include <common.h>
-#include <mpc83xx.h>
-#include <pci.h>
-#include <i2c.h>
-#include <asm/fsl_i2c.h>
-#include <linux/delay.h>
-#include "../common/pq-mds-pib.h"
-
-static struct pci_region pci1_regions[] = {
-	{
-		bus_start: CONFIG_SYS_PCI1_MEM_BASE,
-		phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
-		size: CONFIG_SYS_PCI1_MEM_SIZE,
-		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_IO_BASE,
-		phys_start: CONFIG_SYS_PCI1_IO_PHYS,
-		size: CONFIG_SYS_PCI1_IO_SIZE,
-		flags: PCI_REGION_IO
-	},
-	{
-		bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
-		phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
-		size: CONFIG_SYS_PCI1_MMIO_SIZE,
-		flags: PCI_REGION_MEM
-	},
-};
-
-#ifdef CONFIG_MPC83XX_PCI2
-static struct pci_region pci2_regions[] = {
-	{
-		bus_start: CONFIG_SYS_PCI2_MEM_BASE,
-		phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
-		size: CONFIG_SYS_PCI2_MEM_SIZE,
-		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
-	},
-	{
-		bus_start: CONFIG_SYS_PCI2_IO_BASE,
-		phys_start: CONFIG_SYS_PCI2_IO_PHYS,
-		size: CONFIG_SYS_PCI2_IO_SIZE,
-		flags: PCI_REGION_IO
-	},
-	{
-		bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
-		phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
-		size: CONFIG_SYS_PCI2_MMIO_SIZE,
-		flags: PCI_REGION_MEM
-	},
-};
-#endif
-
-void pci_init_board(void)
-#ifdef CONFIG_PCISLAVE
-{
-	volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
-	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
-	volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
-	struct pci_region *reg[] = { pci1_regions };
-
-	/* Configure PCI Local Access Windows */
-	pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
-	pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
-
-	pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
-	pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
-
-	mpc83xx_pci_init(1, reg);
-
-	/*
-	 * Configure PCI Inbound Translation Windows
-	 */
-	pci_ctrl[0].pitar0 = 0x0;
-	pci_ctrl[0].pibar0 = 0x0;
-	pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
-	    PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
-
-	pci_ctrl[0].pitar1 = 0x0;
-	pci_ctrl[0].pibar1 = 0x0;
-	pci_ctrl[0].piebar1 = 0x0;
-	pci_ctrl[0].piwar1 &= ~PIWAR_EN;
-
-	pci_ctrl[0].pitar2 = 0x0;
-	pci_ctrl[0].pibar2 = 0x0;
-	pci_ctrl[0].piebar2 = 0x0;
-	pci_ctrl[0].piwar2 &= ~PIWAR_EN;
-
-	/* Unlock the configuration bit */
-	mpc83xx_pcislave_unlock(0);
-	printf("PCI:   Agent mode enabled\n");
-}
-#else
-{
-	volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
-	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
-	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
-#ifndef CONFIG_MPC83XX_PCI2
-	struct pci_region *reg[] = { pci1_regions };
-#else
-	struct pci_region *reg[] = { pci1_regions, pci2_regions };
-#endif
-
-	/* initialize the PCA9555PW IO expander on the PIB board */
-	pib_init();
-
-#if defined(CONFIG_PCI_66M)
-	clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
-	printf("PCI clock is 66MHz\n");
-#elif defined(CONFIG_PCI_33M)
-	clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
-	    OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
-	printf("PCI clock is 33MHz\n");
-#else
-	clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
-	printf("PCI clock is 66MHz\n");
-#endif
-	udelay(2000);
-
-	/* Configure PCI Local Access Windows */
-	pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
-	pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
-
-	pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
-	pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
-
-	udelay(2000);
-
-#ifndef CONFIG_MPC83XX_PCI2
-	mpc83xx_pci_init(1, reg);
-#else
-	mpc83xx_pci_init(2, reg);
-#endif
-}
-#endif				/* CONFIG_PCISLAVE */