diff options
author | Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> | 2019-05-23 12:43:43 +0300 |
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committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-08-22 06:37:35 +0300 |
commit | cf0bbbd1ee7b7c5e40db81c6b61d82e853dd50fb (patch) | |
tree | 22b980b6c204495ecd6a60b278904b5af6ebc8e4 /board/freescale | |
parent | 1e60ccd94318fb86610e1e28512b2aaac5f4b069 (diff) | |
download | u-boot-cf0bbbd1ee7b7c5e40db81c6b61d82e853dd50fb.tar.xz |
drivers: net: mc: Report extra memory to Linux
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/ls1088a/ls1088a.c | 31 | ||||
-rw-r--r-- | board/freescale/ls2080ardb/ls2080ardb.c | 32 | ||||
-rw-r--r-- | board/freescale/lx2160a/lx2160a.c | 31 |
3 files changed, 85 insertions, 9 deletions
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index f0bea7327d..690adc4c77 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -739,11 +739,26 @@ void fsl_fdt_fixup_flash(void *fdt) int ft_board_setup(void *blob, bd_t *bd) { int i; - u64 base[CONFIG_NR_DRAM_BANKS]; - u64 size[CONFIG_NR_DRAM_BANKS]; + u16 mc_memory_bank = 0; + + u64 *base; + u64 *size; + u64 mc_memory_base = 0; + u64 mc_memory_size = 0; + u16 total_memory_banks; ft_cpu_setup(blob, bd); + fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size); + + if (mc_memory_base != 0) + mc_memory_bank++; + + total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank; + + base = calloc(total_memory_banks, sizeof(u64)); + size = calloc(total_memory_banks, sizeof(u64)); + /* fixup DT for the two GPP DDR banks */ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { base[i] = gd->bd->bi_dram[i].start; @@ -760,7 +775,17 @@ int ft_board_setup(void *blob, bd_t *bd) size[1] = gd->arch.resv_ram - base[1]; #endif - fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS); + if (mc_memory_base != 0) { + for (i = 0; i <= total_memory_banks; i++) { + if (base[i] == 0 && size[i] == 0) { + base[i] = mc_memory_base; + size[i] = mc_memory_size; + break; + } + } + } + + fdt_fixup_memory_banks(blob, base, size, total_memory_banks); fdt_fsl_mc_fixup_iommu_map_entry(blob); diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 2b2dbbb0ce..e000b1fd51 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -410,11 +410,27 @@ void fsl_fdt_fixup_flash(void *fdt) int ft_board_setup(void *blob, bd_t *bd) { - u64 base[CONFIG_NR_DRAM_BANKS]; - u64 size[CONFIG_NR_DRAM_BANKS]; + int i; + u16 mc_memory_bank = 0; + + u64 *base; + u64 *size; + u64 mc_memory_base = 0; + u64 mc_memory_size = 0; + u16 total_memory_banks; ft_cpu_setup(blob, bd); + fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size); + + if (mc_memory_base != 0) + mc_memory_bank++; + + total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank; + + base = calloc(total_memory_banks, sizeof(u64)); + size = calloc(total_memory_banks, sizeof(u64)); + /* fixup DT for the two GPP DDR banks */ base[0] = gd->bd->bi_dram[0].start; size[0] = gd->bd->bi_dram[0].size; @@ -431,7 +447,17 @@ int ft_board_setup(void *blob, bd_t *bd) size[1] = gd->arch.resv_ram - base[1]; #endif - fdt_fixup_memory_banks(blob, base, size, 2); + if (mc_memory_base != 0) { + for (i = 0; i <= total_memory_banks; i++) { + if (base[i] == 0 && size[i] == 0) { + base[i] = mc_memory_base; + size[i] = mc_memory_size; + break; + } + } + } + + fdt_fixup_memory_banks(blob, base, size, total_memory_banks); fdt_fsl_mc_fixup_iommu_map_entry(blob); diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index f3885fa8b7..3dfbfebedc 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -529,11 +529,26 @@ void board_quiesce_devices(void) int ft_board_setup(void *blob, bd_t *bd) { int i; - u64 base[CONFIG_NR_DRAM_BANKS]; - u64 size[CONFIG_NR_DRAM_BANKS]; + u16 mc_memory_bank = 0; + + u64 *base; + u64 *size; + u64 mc_memory_base = 0; + u64 mc_memory_size = 0; + u16 total_memory_banks; ft_cpu_setup(blob, bd); + fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size); + + if (mc_memory_base != 0) + mc_memory_bank++; + + total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank; + + base = calloc(total_memory_banks, sizeof(u64)); + size = calloc(total_memory_banks, sizeof(u64)); + /* fixup DT for the three GPP DDR banks */ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { base[i] = gd->bd->bi_dram[i].start; @@ -553,7 +568,17 @@ int ft_board_setup(void *blob, bd_t *bd) size[2] = gd->arch.resv_ram - base[2]; #endif - fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS); + if (mc_memory_base != 0) { + for (i = 0; i <= total_memory_banks; i++) { + if (base[i] == 0 && size[i] == 0) { + base[i] = mc_memory_base; + size[i] = mc_memory_size; + break; + } + } + } + + fdt_fixup_memory_banks(blob, base, size, total_memory_banks); #ifdef CONFIG_USB fsl_fdt_fixup_dr_usb(blob, bd); |