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authorSimon Glass <sjg@chromium.org>2020-12-04 02:55:21 +0300
committerSimon Glass <sjg@chromium.org>2020-12-14 02:51:09 +0300
commitd1998a9fde0a917d6496299f6a97b6bccfdc6724 (patch)
tree1931d0c875e829620180bf383722c1a69bd1a951 /board/intel
parentc69cda25c9b59e53a6bc8969ada58942549f5b5d (diff)
downloadu-boot-d1998a9fde0a917d6496299f6a97b6bccfdc6724.tar.xz
dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/intel')
-rw-r--r--board/intel/galileo/galileo.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c
index 720350d0f7..341b627a65 100644
--- a/board/intel/galileo/galileo.c
+++ b/board/intel/galileo/galileo.c
@@ -12,7 +12,7 @@
* Intel Galileo gen2 board uses GPIO Resume Well bank pin0 as the PERST# pin.
*
* We cannot use any public GPIO APIs in <asm-generic/gpio.h> to control this
- * pin, as these APIs will eventually call into gpio_ich6_ofdata_to_platdata()
+ * pin, as these APIs will eventually call into gpio_ich6_of_to_plat()
* in the Intel ICH6 GPIO driver where it calls PCI configuration space access
* APIs which will trigger PCI enumeration process.
*