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| author | Tom Rini <trini@konsulko.com> | 2023-02-28 01:28:21 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-02-28 01:28:21 +0300 |
| commit | 5b197eee334bdf75cc9e9148161299679a5251ea (patch) | |
| tree | edec3c21a01fb54d764d04caa2bd774823e76c2d /board/nvidia/cardhu/cardhu-spl.c | |
| parent | 7a826ded4a0e409d73ff4a910685821d34f1b664 (diff) | |
| parent | e8c80ac0f7a13bf0fc016ce324b870c0cff7a2b8 (diff) | |
| download | u-boot-5b197eee334bdf75cc9e9148161299679a5251ea.tar.xz | |
Merge tag 'v2023.04-rc3' into next
Prepare v2023.04-rc3
Diffstat (limited to 'board/nvidia/cardhu/cardhu-spl.c')
| -rw-r--r-- | board/nvidia/cardhu/cardhu-spl.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/board/nvidia/cardhu/cardhu-spl.c b/board/nvidia/cardhu/cardhu-spl.c new file mode 100644 index 0000000000..de2fa300f1 --- /dev/null +++ b/board/nvidia/cardhu/cardhu-spl.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2021 + * Svyatoslav Ryhel <clamor95@gmail.com> + */ + +#include <common.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <linux/delay.h> + +/* I2C addr is in 8 bit */ +#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR 0xC0 +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, + TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} |