diff options
| author | Niel Fourie <lusus@denx.de> | 2020-07-24 17:33:27 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2020-08-03 18:03:57 +0300 |
| commit | a1c6aed1de01d5ea31e67bc66962fe2641fa81c6 (patch) | |
| tree | 1a584d3f034db739ef893d66ab3208de444189a9 /board/phytec | |
| parent | 1e7a69f661ae792e3e4bdc0156b26d87d089f5db (diff) | |
| download | u-boot-a1c6aed1de01d5ea31e67bc66962fe2641fa81c6.tar.xz | |
arm: imx6q: pcm058: Rework SPI NOR configuration
Enable CONFIG_SPL_DM_SPI_FLASH to be able to boot from SPI NOR,
modify the offset of U-boot proper in the SPI NOR, so the
difference in offset matches between SPL and U-boot matches that of
the SD Card, allowing u-boot-with-spl.imx to also be copied to SPI
NOR at an offset of 0x400. Update the README to reflect this
change.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board/phytec')
| -rw-r--r-- | board/phytec/pcm058/README | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/board/phytec/pcm058/README b/board/phytec/pcm058/README index 02be0994fc..687366bffb 100644 --- a/board/phytec/pcm058/README +++ b/board/phytec/pcm058/README @@ -61,17 +61,21 @@ Then, clear the SPI flash: => sf probe => sf erase 0x0 0x1000000 -Load the SPL from raw MMC into memory and copy to the SPI. The SPL is maximum -392*512-byte blocks in size therefore 0x188 blocks, totaling 0x31000 bytes: +Load the equivalent of u-boot-with-spl.imx from the raw MMC into memory and +copy to the SPI. The SPL is expected at an offset of 0x400, and its size is +maximum 392*512-byte blocks in size, therefore 0x188 blocks, totaling 0x31000 +bytes. Assume U-boot should fit into 640KiB, therefore 0x500 512-byte blocks, +totalling 0xA0000 bytes. Adding these together: -=> mmc read ${loadaddr} 0x2 0x188 -=> sf write ${loadaddr} 0x400 0x31000 +=> mmc read ${loadaddr} 0x2 0x688 +=> sf write ${loadaddr} 0x400 0xD1000 -Load the U-boot binary into memory and copy to the SPI. U-boot should fit into -640KiB, so 0x500 512-byte blocks, totalling 0xA0000 bytes: +The SPL is located at offset 0x400, and U-boot at 0x31400 in SPI flash, as to +match the SD Card layout. This would allow, instead of reading from the SD Card +above, with networking and TFTP correctly configured, the equivalent of: -=> mmc read ${loadaddr} 0x18a 0x500 -=> sf write ${loadaddr} 0x40000 0xA0000 +=> tftp u-boot-with-spl.imx +=> sf write ${fileaddr} 0x400 ${filesize} The default NAND bootscripts expect a single MTD partition named "rootfs", which in turn contains the UBI volumes "fit" (which contains the kernel fit- |