diff options
author | Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> | 2015-12-14 05:24:44 +0300 |
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committer | Marek Vasut <marex@denx.de> | 2018-10-18 20:07:46 +0300 |
commit | 355683c35ee8f935c88f2a0cf300a9c697ad422e (patch) | |
tree | 2dfa55e1139e4e101b9d96e3d2b8cab8a4f1801f /board/renesas/ulcb | |
parent | e3beca3a2fe172ca707a0e70310f9f7ebd3b3f0f (diff) | |
download | u-boot-355683c35ee8f935c88f2a0cf300a9c697ad422e.tar.xz |
ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3
This patch fixes the write-protect control of CPG.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Diffstat (limited to 'board/renesas/ulcb')
-rw-r--r-- | board/renesas/ulcb/ulcb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 213e869ebe..dfe8efd3ac 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; #define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C +#define CPGWPR 0xE6150900 #define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) @@ -39,8 +39,8 @@ void s_init(void) writel(0xA5A5A500, &rwdt->rwtcsra); writel(0xA5A5A500, &swdt->swtcsra); + writel(0x5A5AFFFF, CPGWPR); writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } #define GSX_MSTP112 BIT(12) /* 3DG */ |