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authorTom Rini <trini@konsulko.com>2021-12-14 21:36:40 +0300
committerTom Rini <trini@konsulko.com>2021-12-28 00:20:18 +0300
commit2f8a6db5d83b103e372172422a3d0aff873f1299 (patch)
tree419f0a496c644b438c2702b23f86686eb0758f85 /board/renesas
parente4c3ce7e2845d75dc1696b2875bb632993a9c51c (diff)
downloadu-boot-2f8a6db5d83b103e372172422a3d0aff873f1299.tar.xz
Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/renesas')
-rw-r--r--board/renesas/eagle/eagle.c3
-rw-r--r--board/renesas/gose/gose.c3
-rw-r--r--board/renesas/koelsch/koelsch.c3
-rw-r--r--board/renesas/lager/lager.c3
-rw-r--r--board/renesas/porter/porter.c3
-rw-r--r--board/renesas/stout/stout.c3
6 files changed, 12 insertions, 6 deletions
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 3417b50f3b..9af935c33f 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <hang.h>
#include <init.h>
@@ -50,7 +51,7 @@ void s_init(void)
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 0.8GHz */
- stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET;
+ stc = ((800 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_OFFSET;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
}
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 51768c315e..6197e549c2 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -6,6 +6,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
@@ -45,7 +46,7 @@ void s_init(void)
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.5GHz */
- stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+ stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
/* QoS */
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index 7e94bd8205..87607df20d 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
@@ -47,7 +48,7 @@ void s_init(void)
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.5GHz */
- stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+ stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
/* QoS */
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 87c5e01371..8e24ac013c 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <env_internal.h>
@@ -50,7 +51,7 @@ void s_init(void)
/* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
- u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+ u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index b0f8505252..1a3a4c11a1 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -7,6 +7,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <cpu_func.h>
#include <env.h>
#include <hang.h>
@@ -47,7 +48,7 @@ void s_init(void)
writel(0xA5A5A500, &swdt->swtcsra);
/* CPU frequency setting. Set to 1.5GHz */
- stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+ stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
/* QoS */
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 3fdf936ddc..56bdb34329 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -9,6 +9,7 @@
*/
#include <common.h>
+#include <clock_legacy.h>
#include <env.h>
#include <init.h>
#include <malloc.h>
@@ -50,7 +51,7 @@ void s_init(void)
/* CPU frequency setting. Set to 1.4GHz */
if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
u32 stat = 0;
- u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+ u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
<< PLL0_STC_BIT;
clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);