ARM: renesas: Add R8A779A0 V3U Falcon board code

Add board code for the R8A779A0 V3U Falcon board.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - various small rebase fixes and clean ups

4 files changed, 81 insertions, 0 deletions

diff --git a/board/renesas/falcon/Kconfig b/board/renesas/falcon/Kconfig
new file mode 100644
index 0000000000..1fcefa7e3c
--- /dev/null
+++ b/board/renesas/falcon/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_FALCON
+
+config SYS_SOC
+	default "rmobile"
+
+config SYS_BOARD
+	default "falcon"
+
+config SYS_VENDOR
+	default "renesas"
+
+config SYS_CONFIG_NAME
+	default "falcon"
+
+endif
diff --git a/board/renesas/falcon/MAINTAINERS b/board/renesas/falcon/MAINTAINERS
new file mode 100644
index 0000000000..2cacc91494
--- /dev/null
+++ b/board/renesas/falcon/MAINTAINERS
@@ -0,0 +1,6 @@
+FALCON BOARD
+M:	Marek Vasut <marek.vasut+renesas@gmail.com>
+S:	Maintained
+F:	board/renesas/falcon/
+F:	include/configs/falcon.h
+F:	configs/r8a779a0_falcon_defconfig
diff --git a/board/renesas/falcon/Makefile b/board/renesas/falcon/Makefile
new file mode 100644
index 0000000000..3b202c24fb
--- /dev/null
+++ b/board/renesas/falcon/Makefile
@@ -0,0 +1,13 @@
+#
+# board/renesas/falcon/Makefile
+#
+# Copyright (C) 2020 Renesas Electronics Corp.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifdef CONFIG_SPL_BUILD
+obj-y	:= ../rcar-common/gen3-spl.o
+else
+obj-y	:= falcon.o ../rcar-common/common.o
+endif
diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c
new file mode 100644
index 0000000000..3e591e4b42
--- /dev/null
+++ b/board/renesas/falcon/falcon.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * board/renesas/falcon/falcon.c
+ *     This file is Falcon board support.
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include <common.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/processor.h>
+#include <linux/errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define CPGWPR		0xE6150000
+#define CPGWPCR		0xE6150004
+
+int board_early_init_f(void)
+{
+	/* Unlock CPG access */
+	writel(0x5A5AFFFF, CPGWPR);
+	writel(0xA5A50000, CPGWPCR);
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
+
+	return 0;
+}
+
+#define RST_BASE	0xE6160000 /* Domain0 */
+#define RST_SRESCR0	(RST_BASE + 0x18)
+#define RST_SPRES	0x5AA58000
+
+void reset_cpu(void)
+{
+	writel(RST_SPRES, RST_SRESCR0);
+}