diff options
| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 11:18:16 +0300 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 08:52:33 +0300 |
| commit | 133ec602846d28a7915a7b3149d05d1c8a270873 (patch) | |
| tree | 507157ce06ed8113cb03196d664e5d28eecac486 /board/sbc8349 | |
| parent | 8a81bfd271f9122933c865c790780024f5e2d576 (diff) | |
| download | u-boot-133ec602846d28a7915a7b3149d05d1c8a270873.tar.xz | |
mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE
CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'board/sbc8349')
| -rw-r--r-- | board/sbc8349/sbc8349.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index 5584b3d179..e51eeae065 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -79,19 +79,19 @@ int fixed_sdram(void) u32 ddr_size = msize << 20; /* DDR size in bytes */ u32 ddr_size_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000; + im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); #if (CONFIG_SYS_DDR_SIZE != 256) #warning Currently any ddr size other than 256 is not supported #endif -#if ((CONFIG_SYS_DDR_SDRAM_BASE & 0x00FFFFFF) != 0) +#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0) #warning Chip select bounds is only configurable in 16MB increments #endif im->ddr.csbnds[2].csbnds = - ((CONFIG_SYS_DDR_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | - (((CONFIG_SYS_DDR_SDRAM_BASE + ddr_size - 1) >> + ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) | + (((CONFIG_SYS_SDRAM_BASE + ddr_size - 1) >> CSBNDS_EA_SHIFT) & CSBNDS_EA); im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG; |