diff options
author | Lokesh Vutla <lokeshvutla@ti.com> | 2019-06-13 07:59:49 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2019-07-27 04:49:27 +0300 |
commit | f81850322af1abd367d64a68d34cd07f823a45d2 (patch) | |
tree | ce3de6705afd105f9c9f171552be568196bdc657 /board/ti | |
parent | 5bc22e327753444011cbb5d6a29f9e43b4c475ba (diff) | |
download | u-boot-f81850322af1abd367d64a68d34cd07f823a45d2.tar.xz |
board: ti: j721e: Add board support for j721e evm
Add board specific initialization for j721e evm
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Diffstat (limited to 'board/ti')
-rw-r--r-- | board/ti/j721e/Kconfig | 55 | ||||
-rw-r--r-- | board/ti/j721e/Makefile | 8 | ||||
-rw-r--r-- | board/ti/j721e/evm.c | 68 |
3 files changed, 131 insertions, 0 deletions
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig new file mode 100644 index 0000000000..c2deb6916a --- /dev/null +++ b/board/ti/j721e/Kconfig @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ +# Lokesh Vutla <lokeshvutla@ti.com> + +choice + prompt "K3 J721E based boards" + optional + +config TARGET_J721E_A72_EVM + bool "TI K3 based J721E EVM running on A72" + select ARM64 + select SOC_K3_J721E + select SYS_DISABLE_DCACHE_OPS + +config TARGET_J721E_R5_EVM + bool "TI K3 based J721E EVM running on R5" + select CPU_V7R + select SYS_THUMB_BUILD + select SOC_K3_J721E + select K3_LOAD_SYSFW + select RAM + select SPL_RAM + imply SYS_K3_SPL_ATF + +endchoice + +if TARGET_J721E_A72_EVM + +config SYS_BOARD + default "j721e" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j721e_evm" + +endif + +if TARGET_J721E_R5_EVM + +config SYS_BOARD + default "j721e" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "j721e_evm" + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +endif diff --git a/board/ti/j721e/Makefile b/board/ti/j721e/Makefile new file mode 100644 index 0000000000..97535f5d86 --- /dev/null +++ b/board/ti/j721e/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ +# Lokesh Vutla <lokeshvutla@ti.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evm.o diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c new file mode 100644 index 0000000000..43d502b6ca --- /dev/null +++ b/board/ti/j721e/evm.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board specific initialization for J721E EVM + * + * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Lokesh Vutla <lokeshvutla@ti.com> + * + */ + +#include <common.h> +#include <asm/io.h> +#include <spl.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ +#ifdef CONFIG_PHYS_64BIT + gd->ram_size = 0x100000000; +#else + gd->ram_size = 0x80000000; +#endif + + return 0; +} + +ulong board_get_usable_ram_top(ulong total_size) +{ +#ifdef CONFIG_PHYS_64BIT + /* Limit RAM used by U-Boot to the DDR low region */ + if (gd->ram_top > 0x100000000) + return 0x100000000; +#endif + + return gd->ram_top; +} + +int dram_init_banksize(void) +{ + /* Bank 0 declares the memory available in the DDR low region */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = 0x80000000; + gd->ram_size = 0x80000000; + +#ifdef CONFIG_PHYS_64BIT + /* Bank 1 declares the memory available in the DDR high region */ + gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].size = 0x80000000; + gd->ram_size = 0x100000000; +#endif + + return 0; +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (!strcmp(name, "k3-j721e-common-proc-board")) + return 0; + + return -1; +} +#endif |