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authorJorge Ramirez-Ortiz <jorge@foundries.io>2021-10-13 16:48:00 +0300
committerMichal Simek <michal.simek@xilinx.com>2021-10-21 09:51:00 +0300
commit398a74ae330dfc4e46744874ebbe5394d2679c37 (patch)
tree4b3bc5664a06959f948d828aef4cc70e946f8fc9 /board/xilinx
parenta3e3d4698e3c5812bba76cf0f35a0f71b27d5973 (diff)
downloadu-boot-398a74ae330dfc4e46744874ebbe5394d2679c37.tar.xz
zynqmp: restore the jtag interface
When boot.bin is configured for secure boot the CSU will disable the JTAG interface on all cases. Some boards might rely on this interface for flashing to QSPI in which case those systems might end up bricked during development. This commit will restore the interface under CSU control Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Link: https://lore.kernel.org/r/20211013134800.19452-1-jorge@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx')
-rw-r--r--board/xilinx/zynqmp/zynqmp.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 000a7cde8d..b24db5306a 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -358,6 +358,21 @@ static int multi_boot(void)
return multiboot;
}
+#if defined(CONFIG_SPL_BUILD)
+static void restore_jtag(void)
+{
+ if (current_el() != 3)
+ return;
+
+ writel(CSU_JTAG_SEC_GATE_DISABLE, &csu_base->jtag_sec);
+ writel(CSU_JTAG_DAP_ENABLE_DEBUG, &csu_base->jtag_dap_cfg);
+ writel(CSU_JTAG_CHAIN_WR_SETUP, &csu_base->jtag_chain_status_wr);
+ writel(CRLAPB_DBG_LPD_CTRL_SETUP_CLK, &crlapb_base->dbg_lpd_ctrl);
+ writel(CRLAPB_RST_LPD_DBG_RESET, &crlapb_base->rst_lpd_dbg);
+ writel(CSU_PCAP_PROG_RELEASE_PL, &csu_base->pcap_prog);
+}
+#endif
+
#define PS_SYSMON_ANALOG_BUS_VAL 0x3210
#define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914
@@ -377,6 +392,10 @@ int board_init(void)
zynqmp_pmufw_load_config_object(zynqmp_pm_cfg_obj,
zynqmp_pm_cfg_obj_size);
printf("Silicon version:\t%d\n", zynqmp_get_silicon_version());
+
+ /* the CSU disables the JTAG interface when secure boot is enabled */
+ if (CONFIG_IS_ENABLED(SPL_ZYNQMP_RESTORE_JTAG))
+ restore_jtag();
#else
if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
xilinx_read_eeprom();