diff options
| author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | 2023-01-10 10:44:07 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-01-16 17:34:37 +0300 |
| commit | 724379d9afc850de2767094987a761f096af7718 (patch) | |
| tree | dae54522689ef43d46e7a4939a191d22bd532cbf /board/xilinx | |
| parent | 29b58bba91147c3c03dcb998a1efe4a4d026d7e1 (diff) | |
| download | u-boot-724379d9afc850de2767094987a761f096af7718.tar.xz | |
xilinx: versal-net: Add support for timer and start it
Add support for starting timer by setting up time stamp generator
registers. This is done only for EL3 i.e. mini U-Boot case.
For other cases, it will be done TF-A.
Add COUNTER_FREQUENCY and IOU_SWITCH_DIVISOR0 to Kconfig so that they
can be tuned as required.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fcd8b0dc4b45a11f5e753afff42f84738ac813da.1673336645.git.michal.simek@amd.com
Diffstat (limited to 'board/xilinx')
| -rw-r--r-- | board/xilinx/versal-net/board.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index 760031927f..5fb71107dd 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -121,6 +121,47 @@ int board_early_init_f(void) int board_early_init_r(void) { + u32 val; + + if (current_el() != 3) + return 0; + + debug("iou_switch ctrl div0 %x\n", + readl(&crlapb_base->iou_switch_ctrl)); + + writel(IOU_SWITCH_CTRL_CLKACT_BIT | + (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), + &crlapb_base->iou_switch_ctrl); + + /* Global timer init - Program time stamp reference clk */ + val = readl(&crlapb_base->timestamp_ref_ctrl); + val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; + writel(val, &crlapb_base->timestamp_ref_ctrl); + + debug("ref ctrl 0x%x\n", + readl(&crlapb_base->timestamp_ref_ctrl)); + + /* Clear reset of timestamp reg */ + writel(0, &crlapb_base->rst_timestamp); + + /* + * Program freq register in System counter and + * enable system counter. + */ + writel(CONFIG_COUNTER_FREQUENCY, + &iou_scntr_secure->base_frequency_id_register); + + debug("counter val 0x%x\n", + readl(&iou_scntr_secure->base_frequency_id_register)); + + writel(IOU_SCNTRS_CONTROL_EN, + &iou_scntr_secure->counter_control_register); + + debug("scntrs control 0x%x\n", + readl(&iou_scntr_secure->counter_control_register)); + debug("timer 0x%llx\n", get_ticks()); + debug("timer 0x%llx\n", get_ticks()); + return 0; } |