diff options
author | Arkadiusz Karas <arkadiusz.karas@somlabs.com> | 2020-01-02 21:31:21 +0300 |
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committer | Stefano Babic <sbabic@denx.de> | 2020-01-20 17:38:16 +0300 |
commit | 5b6f8f3083557569c5fdd9823f50fe14f27dcaef (patch) | |
tree | 1fa61aa90c2e693fc03f78d127636953df5f2013 /board | |
parent | 9d1230332208b260c23adba2298e5dab9b23a358 (diff) | |
download | u-boot-5b6f8f3083557569c5fdd9823f50fe14f27dcaef.tar.xz |
ARM: imx: mx6ull: Add iMX6ULL VisionSOM SoM and EVK
Add iMX6ULL VisionSOM SoM and VisionCB-RT-STD evaluation board support.
The SoM has an iMX6ULL, 512 MiB of DRAM and microSD slot. The carrier
board has Ethernet, USB host port, USB OTG port.
Signed-off-by: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/somlabs/visionsom-6ull/Kconfig | 12 | ||||
-rw-r--r-- | board/somlabs/visionsom-6ull/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/somlabs/visionsom-6ull/Makefile | 4 | ||||
-rw-r--r-- | board/somlabs/visionsom-6ull/imximage.cfg | 107 | ||||
-rw-r--r-- | board/somlabs/visionsom-6ull/visionsom-6ull.c | 146 |
5 files changed, 275 insertions, 0 deletions
diff --git a/board/somlabs/visionsom-6ull/Kconfig b/board/somlabs/visionsom-6ull/Kconfig new file mode 100644 index 0000000000..37408aa798 --- /dev/null +++ b/board/somlabs/visionsom-6ull/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SOMLABS_VISIONSOM_6ULL + +config SYS_BOARD + default "visionsom-6ull" + +config SYS_VENDOR + default "somlabs" + +config SYS_CONFIG_NAME + default "somlabs_visionsom_6ull" + +endif diff --git a/board/somlabs/visionsom-6ull/MAINTAINERS b/board/somlabs/visionsom-6ull/MAINTAINERS new file mode 100644 index 0000000000..905c000bc4 --- /dev/null +++ b/board/somlabs/visionsom-6ull/MAINTAINERS @@ -0,0 +1,6 @@ +VISIONSOM-6ULL BOARD +M: Arkadiusz Karas <arkadiusz.karas@somlabs.com> +S: Maintained +F: board/somlabs/visionsom-6ull/ +F: include/configs/somlabs_visionsom_6ull.h +F: configs/somlabs_visionsom_6ull_defconfig diff --git a/board/somlabs/visionsom-6ull/Makefile b/board/somlabs/visionsom-6ull/Makefile new file mode 100644 index 0000000000..9c3768aa45 --- /dev/null +++ b/board/somlabs/visionsom-6ull/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# (C) Copyright 2019 Arkadiusz Karas <arkadiusz.karas@somlabs.com> + +obj-y := visionsom-6ull.o diff --git a/board/somlabs/visionsom-6ull/imximage.cfg b/board/somlabs/visionsom-6ull/imximage.cfg new file mode 100644 index 0000000000..b49a2df6dd --- /dev/null +++ b/board/somlabs/visionsom-6ull/imximage.cfg @@ -0,0 +1,107 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017 A. Karas + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : sd + */ + +BOOT_FROM sd + +/* + * Secure boot support + */ +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Micron MT41K256M16TW-107 */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +DATA 4 0x020E04B4 0x000C0000 +DATA 4 0x020E04AC 0x00000000 +DATA 4 0x020E027C 0x00000030 +DATA 4 0x020E0250 0x00000030 +DATA 4 0x020E024C 0x00000030 +DATA 4 0x020E0490 0x00000030 +DATA 4 0x020E0288 0x00000030 +DATA 4 0x020E0270 0x00000000 +DATA 4 0x020E0260 0x00000030 +DATA 4 0x020E0264 0x00000030 +DATA 4 0x020E04A0 0x00000030 +DATA 4 0x020E0494 0x00020000 +DATA 4 0x020E0280 0x00000030 +DATA 4 0x020E0284 0x00000030 +DATA 4 0x020E04B0 0x00020000 +DATA 4 0x020E0498 0x00000030 +DATA 4 0x020E04A4 0x00000030 +DATA 4 0x020E0244 0x00000030 +DATA 4 0x020E0248 0x00000030 +DATA 4 0x021B001C 0x00008000 +DATA 4 0x021B0800 0xA1390003 +DATA 4 0x021B080C 0x00000000 +DATA 4 0x021B083C 0x41570155 +DATA 4 0x021B0848 0x4040474A +DATA 4 0x021B0850 0x40405550 +DATA 4 0x021B081C 0x33333333 +DATA 4 0x021B0820 0x33333333 +DATA 4 0x021B082C 0xf3333333 +DATA 4 0x021B0830 0xf3333333 +DATA 4 0x021B08C0 0x00921012 +DATA 4 0x021B08b8 0x00000800 +DATA 4 0x021B0004 0x0002002D +DATA 4 0x021B0008 0x1B333030 +DATA 4 0x021B000C 0x676B52F3 +DATA 4 0x021B0010 0xB66D0B63 +DATA 4 0x021B0014 0x01FF00DB +DATA 4 0x021B0018 0x00201740 +DATA 4 0x021B001C 0x00008000 +DATA 4 0x021B002C 0x000026D2 +DATA 4 0x021B0030 0x006B1023 +DATA 4 0x021B0040 0x0000004F +DATA 4 0x021B0000 0x84180000 +DATA 4 0x021B0890 0x23400A38 +DATA 4 0x021B001C 0x02008032 +DATA 4 0x021B001C 0x00008033 +DATA 4 0x021B001C 0x00048031 +DATA 4 0x021B001C 0x15208030 +DATA 4 0x021B001C 0x04008040 +DATA 4 0x021B0020 0x00000800 +DATA 4 0x021B0818 0x00000227 +DATA 4 0x021B0004 0x0002552D +DATA 4 0x021B0404 0x00011006 +DATA 4 0x021B001C 0x00000000 diff --git a/board/somlabs/visionsom-6ull/visionsom-6ull.c b/board/somlabs/visionsom-6ull/visionsom-6ull.c new file mode 100644 index 0000000000..bc7257be40 --- /dev/null +++ b/board/somlabs/visionsom-6ull/visionsom-6ull.c @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017-2019 A. Karas, SomLabs + * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. + */ + +#include <init.h> +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/io.h> +#include <common.h> +#include <env.h> +#include <fsl_esdhc_imx.h> +#include <i2c.h> +#include <miiphy.h> +#include <linux/sizes.h> +#include <mmc.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +#ifdef CONFIG_FEC_MXC +static int setup_fec(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + /* + * Use 50M anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(0, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} +#endif + +int board_mmc_get_env_dev(int devno) +{ + return devno; +} + +int mmc_map_to_kernel_blk(int devno) +{ + return devno; +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_SYS_I2C + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +#endif + +#ifdef CONFIG_FEC_MXC + setup_fec(); +#endif + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"sd1", MAKE_CFGVAL(0x42, 0x20, 0x00, 0x00)}, + {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + + if (is_cpu_type(MXC_CPU_MX6ULL)) + env_set("board", "visionsom-6ull"); + else + env_set("board", "visionsom-6ul"); + + return 0; +} + +int checkboard(void) +{ + printf("Board: SoMLabs VisionSOM-6UL%s\n", + is_cpu_type(MXC_CPU_MX6ULL) ? "L" : ""); + + return 0; +} |