Merge branch 'master' of ../master into next

26 files changed, 531 insertions, 698 deletions

diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds
index e256b198d6..c2a04c7bfc 100644
--- a/board/amcc/acadia/u-boot-nand.lds
+++ b/board/amcc/acadia/u-boot-nand.lds
@@ -26,34 +26,12 @@ SECTIONS
 {
   /* Read-only sections, merged into text segment: */
   . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
   .text      :
   {
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    arch/powerpc/cpu/ppc4xx/start.o	(.text)
+    arch/powerpc/cpu/ppc4xx/start.o	(.text*)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
@@ -61,8 +39,7 @@ SECTIONS
     /* Keep some space here for redundant env and potential bad env blocks */
     . = ALIGN(0x10000);
 
-    *(.text)
-    *(.got1)
+    *(.text*)
   }
   _etext = .;
   PROVIDE (etext = .);
@@ -70,9 +47,6 @@ SECTIONS
   {
     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
   }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
 
   /* Read-write section, merged into data segment: */
   . = (. + 0x00FF) & 0xFFFFFF00;
@@ -80,23 +54,19 @@ SECTIONS
   PROVIDE (erotext = .);
   .reloc   :
   {
-    *(.got)
+    KEEP(*(.got))
     _GOT2_TABLE_ = .;
-    *(.got2)
+    KEEP(*(.got2))
     _FIXUP_TABLE_ = .;
-    *(.fixup)
+    KEEP(*(.fixup))
   }
   __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
   __fixup_entries = (. - _FIXUP_TABLE_)>>2;
 
   .data    :
   {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
+    *(.data*)
+    *(.sdata*)
   }
   _edata  =  .;
   PROVIDE (edata = .);
@@ -122,9 +92,8 @@ SECTIONS
   __bss_start = .;
   .bss (NOLOAD)       :
   {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
+   *(.bss*)
+   *(.sbss*)
    *(COMMON)
    . = ALIGN(4);
   }
diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds
index e256b198d6..c2a04c7bfc 100644
--- a/board/amcc/kilauea/u-boot-nand.lds
+++ b/board/amcc/kilauea/u-boot-nand.lds
@@ -26,34 +26,12 @@ SECTIONS
 {
   /* Read-only sections, merged into text segment: */
   . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text)	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data)	}
-  .rel.rodata    : { *(.rel.rodata)	}
-  .rela.rodata   : { *(.rela.rodata)	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
   .text      :
   {
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    arch/powerpc/cpu/ppc4xx/start.o	(.text)
+    arch/powerpc/cpu/ppc4xx/start.o	(.text*)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
@@ -61,8 +39,7 @@ SECTIONS
     /* Keep some space here for redundant env and potential bad env blocks */
     . = ALIGN(0x10000);
 
-    *(.text)
-    *(.got1)
+    *(.text*)
   }
   _etext = .;
   PROVIDE (etext = .);
@@ -70,9 +47,6 @@ SECTIONS
   {
     *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
   }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
 
   /* Read-write section, merged into data segment: */
   . = (. + 0x00FF) & 0xFFFFFF00;
@@ -80,23 +54,19 @@ SECTIONS
   PROVIDE (erotext = .);
   .reloc   :
   {
-    *(.got)
+    KEEP(*(.got))
     _GOT2_TABLE_ = .;
-    *(.got2)
+    KEEP(*(.got2))
     _FIXUP_TABLE_ = .;
-    *(.fixup)
+    KEEP(*(.fixup))
   }
   __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
   __fixup_entries = (. - _FIXUP_TABLE_)>>2;
 
   .data    :
   {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
+    *(.data*)
+    *(.sdata*)
   }
   _edata  =  .;
   PROVIDE (edata = .);
@@ -122,9 +92,8 @@ SECTIONS
   __bss_start = .;
   .bss (NOLOAD)       :
   {
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
+   *(.bss*)
+   *(.sbss*)
    *(COMMON)
    . = ALIGN(4);
   }
diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c b/board/armltd/vexpress/ca9x4_ct_vxp.c
index 48dfc8c435..ce1be1e766 100644
--- a/board/armltd/vexpress/ca9x4_ct_vxp.c
+++ b/board/armltd/vexpress/ca9x4_ct_vxp.c
@@ -95,16 +95,19 @@ static void flash__init(void)
 
 int dram_init(void)
 {
-	gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
+	gd->ram_size =
+		get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
 	return 0;
 }
 
 void dram_init_banksize(void)
 {
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+	gd->bd->bi_dram[0].size =
+			get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-	gd->bd->bi_dram[1].size = get_ram_size(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+	gd->bd->bi_dram[1].size =
+			get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
 }
 
 int timer_init(void)
@@ -154,7 +157,7 @@ void reset_cpu(ulong addr)
  * Delay x useconds AND perserve advance timstamp value
  *     assumes timer is ticking at 1 msec
  */
-void udelay(ulong usec)
+void __udelay(ulong usec)
 {
 	ulong tmo, tmp;
 
diff --git a/board/armltd/vexpress/config.mk b/board/armltd/vexpress/config.mk
index 2d797d7151..36395f22e5 100644
--- a/board/armltd/vexpress/config.mk
+++ b/board/armltd/vexpress/config.mk
@@ -19,5 +19,4 @@
 #
 # Linux-Kernel is expected to be at 0x60008000
 #
-TEXT_BASE = 0x60800000
-LDSCRIPT := $(SRCTREE)/board/armltd/vexpress/u-boot.lds
+CONFIG_SYS_TEXT_BASE = 0x60800000
diff --git a/board/armltd/vexpress/u-boot.lds b/board/armltd/vexpress/u-boot.lds
deleted file mode 100644
index 5ac62f2c24..0000000000
--- a/board/armltd/vexpress/u-boot.lds
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-	. = ALIGN(4);
-	.text	:
-	{
-		arch/arm/cpu/armv7/start.o	(.text)
-		*(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata))) }
-
-	. = ALIGN(4);
-	.data : { *(.data)
-	__datarel_start = .;
-		*(.data.rel)
-	__datarelrolocal_start = .;
-		*(.data.rel.ro.local)
-	__datarellocal_start = .;
-		*(.data.rel.local)
-	__datarelro_start = .;
-		*(.data.rel.ro)
-	}
-
-	__got_start = .;
-	. = ALIGN(4);
-	.got : { *(.got) }
-	__got_end = .;
-
-	. = .;
-	__u_boot_cmd_start = .;
-	.u_boot_cmd : { *(.u_boot_cmd) }
-	__u_boot_cmd_end = .;
-
-	. = ALIGN(4);
-	__bss_start = .;
-	.bss : { *(.bss) }
-	_end = .;
-}
diff --git a/board/atmel/at91rm9200ek/config.mk b/board/atmel/at91rm9200ek/config.mk
deleted file mode 100644
index c7323fe477..0000000000
--- a/board/atmel/at91rm9200ek/config.mk
+++ /dev/null
@@ -1,2 +0,0 @@
-# currently only NOR flash booting is supported
-CONFIG_SYS_TEXT_BASE = 0x10000000
diff --git a/board/emk/top9000/Makefile b/board/emk/top9000/Makefile
new file mode 100644
index 0000000000..9b280482a9
--- /dev/null
+++ b/board/emk/top9000/Makefile
@@ -0,0 +1,54 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2010
+# Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS-y	+= top9000.o
+COBJS-$(CONFIG_ATMEL_SPI)	+= spi.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/emk/top9000/spi.c b/board/emk/top9000/spi.c
new file mode 100644
index 0000000000..b4689483ac
--- /dev/null
+++ b/board/emk/top9000/spi.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/at91_spi.h>
+#include <asm/arch/gpio.h>
+#include <spi.h>
+
+static const struct {
+	u32	port;
+	u32	bit;
+} cs_to_portbit[2][4] = {
+	{{AT91_PIO_PORTA,  3}, {AT91_PIO_PORTC, 11},
+			{AT91_PIO_PORTC, 16}, {AT91_PIO_PORTC, 17} },
+	{{AT91_PIO_PORTB,  3}, {AT91_PIO_PORTC,  5},
+			{AT91_PIO_PORTC,  4}, {AT91_PIO_PORTC,  3} }
+};
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	debug("spi_cs_is_valid: bus=%u cs=%u\n", bus, cs);
+	if (bus < 2 && cs < 4)
+		return 1;
+	return 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	debug("spi_cs_activate: bus=%u cs=%u\n", slave->bus, slave->cs);
+	at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port,
+		cs_to_portbit[slave->bus][slave->cs].bit, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	debug("spi_cs_deactivate: bus=%u cs=%u\n", slave->bus, slave->cs);
+	at91_set_pio_output(cs_to_portbit[slave->bus][slave->cs].port,
+		cs_to_portbit[slave->bus][slave->cs].bit, 1);
+}
+
diff --git a/board/emk/top9000/top9000.c b/board/emk/top9000/top9000.c
new file mode 100644
index 0000000000..b0fe2d68a8
--- /dev/null
+++ b/board/emk/top9000/top9000.c
@@ -0,0 +1,290 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * (C) Copyright 2010
+ * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <net.h>
+#include <netdev.h>
+#include <mmc.h>
+#include <i2c.h>
+#include <spi.h>
+#include <asm/arch/at91sam9260.h>
+#include <asm/arch/at91sam9260_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_shdwn.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+#include <asm/arch/hardware.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CMD_NAND
+static void nand_hw_init(void)
+{
+	unsigned long csa;
+
+	/* Enable CS3 */
+	csa = at91_sys_read(AT91_MATRIX_EBICSA);
+	at91_sys_write(AT91_MATRIX_EBICSA,
+		csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
+
+	/* Configure SMC CS3 for NAND/SmartMedia */
+	at91_sys_write(AT91_SMC_SETUP(3),
+		AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+		AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
+	at91_sys_write(AT91_SMC_PULSE(3),
+		AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
+		AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
+	at91_sys_write(AT91_SMC_CYCLE(3),
+		AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
+	at91_sys_write(AT91_SMC_MODE(3),
+		AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+		AT91_SMC_EXNWMODE_DISABLE |
+		AT91_SMC_DBW_8 |
+		AT91_SMC_TDF_(2));
+
+	/* Configure RDY/BSY */
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+
+	/* Enable NandFlash */
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+}
+#endif
+
+#ifdef CONFIG_MACB
+static void macb_hw_init(void)
+{
+	/* Enable EMAC clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
+
+	/* Initialize EMAC=MACB hardware */
+	at91_macb_hw_init();
+}
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+/* this is a weak define that we are overriding */
+int board_mmc_init(bd_t *bd)
+{
+	/* Enable MCI clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
+
+	/* Initialize MCI hardware */
+	at91_mci_hw_init();
+
+	/* This calls the atmel_mmc_init in gen_atmel_mci.c */
+	return atmel_mci_init((void *)AT91_BASE_MCI);
+}
+
+/* this is a weak define that we are overriding */
+int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+{
+	/*
+	 * the only currently existing use of this function
+	 * (fsl_esdhc.c) suggests this function must return
+	 * *cs = TRUE if a card is NOT detected -> in most
+	 * cases the value of the pin when the detect switch
+	 * closes to GND
+	 */
+	*cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
+	return 0;
+}
+
+#endif
+
+int board_early_init_f(void)
+{
+	at91_shdwn_t *shdwn = (at91_shdwn_t *)AT91_SHDWN_BASE;
+
+	/*
+	 * make sure the board can be powered on by
+	 * any transition on WKUP
+	 */
+	writel(AT91_SHDW_MR_WKMODE0H2L | AT91_SHDW_MR_WKMODE0L2H,
+		&shdwn->mr);
+
+	/* Enable clocks for all PIOs */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB);
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
+
+	/* set SCL0 and SDA0 to open drain */
+	at91_set_pio_output(I2C0_PORT, SCL0_PIN, 1);
+	at91_set_pio_multi_drive(I2C0_PORT, SCL0_PIN, 1);
+	at91_set_pio_pullup(I2C0_PORT, SCL0_PIN, 1);
+	at91_set_pio_output(I2C0_PORT, SDA0_PIN, 1);
+	at91_set_pio_multi_drive(I2C0_PORT, SDA0_PIN, 1);
+	at91_set_pio_pullup(I2C0_PORT, SDA0_PIN, 1);
+
+	/* set SCL1 and SDA1 to open drain */
+	at91_set_pio_output(I2C1_PORT, SCL1_PIN, 1);
+	at91_set_pio_multi_drive(I2C1_PORT, SCL1_PIN, 1);
+	at91_set_pio_pullup(I2C1_PORT, SCL1_PIN, 1);
+	at91_set_pio_output(I2C1_PORT, SDA1_PIN, 1);
+	at91_set_pio_multi_drive(I2C1_PORT, SDA1_PIN, 1);
+	at91_set_pio_pullup(I2C1_PORT, SDA1_PIN, 1);
+	return 0;
+}
+
+int board_init(void)
+{
+	/* arch number of TOP9000 Board */
+	gd->bd->bi_arch_number = MACH_TYPE_TOP9000;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	at91_serial_hw_init();
+#ifdef CONFIG_CMD_NAND
+	nand_hw_init();
+#endif
+#ifdef CONFIG_MACB
+	macb_hw_init();
+#endif
+#ifdef CONFIG_ATMEL_SPI0
+	/* (n+4) denotes to use nSPISEL(0) in GPIO mode! */
+	at91_spi0_hw_init(1 << (FRAM_CS_NUM + 4));
+#endif
+#ifdef CONFIG_ATMEL_SPI1
+	at91_spi1_hw_init(1 << (ENC_CS_NUM + 4));
+#endif
+	return 0;
+}
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+	/* read 'factory' part of EEPROM */
+	read_factory_r();
+	return 0;
+}
+#endif
+
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size(
+		(void *)CONFIG_SYS_SDRAM_BASE,
+		CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void reset_phy(void)
+{
+	/*
+	 * Initialize ethernet HW addresses prior to starting Linux,
+	 * needed for nfsroot.
+	 * TODO: We need to investigate if that is really necessary.
+	 */
+	eth_init(gd->bd);
+}
+#endif
+
+int board_eth_init(bd_t *bis)
+{
+	int rc = 0;
+	int num = 0;
+#ifdef CONFIG_MACB
+	rc = macb_eth_initialize(0,
+		(void *)AT91_EMAC_BASE,
+		CONFIG_SYS_PHY_ID);
+	if (!rc)
+		num++;
+#endif
+#ifdef CONFIG_ENC28J60
+	rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM,
+		ENC_SPI_CLOCK, SPI_MODE_0);
+	if (!rc)
+		num++;
+# ifdef CONFIG_ENC28J60_2
+	rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+1,
+		ENC_SPI_CLOCK, SPI_MODE_0);
+	if (!rc)
+		num++;
+#  ifdef CONFIG_ENC28J60_3
+	rc = enc28j60_initialize(ENC_SPI_BUS, ENC_CS_NUM+2,
+		ENC_SPI_CLOCK, SPI_MODE_0);
+	if (!rc)
+		num++;
+#  endif
+# endif
+#endif
+	return num;
+}
+
+/*
+ * I2C access functions
+ *
+ * Note:
+ * We need to access Bus 0 before relocation to access the
+ * environment settings.
+ * However i2c_get_bus_num() cannot be called before
+ * relocation.
+ */
+#ifdef CONFIG_SOFT_I2C
+void iic_init(void)
+{
+	/* ports are now initialized in board_early_init_f() */
+}
+
+int iic_read(void)
+{
+	switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+	case 0:
+		return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
+	case 1:
+		return at91_get_pio_value(I2C1_PORT, SDA1_PIN);
+	}
+	return 1;
+}
+
+void iic_sda(int bit)
+{
+	switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+	case 0:
+		at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
+		break;
+	case 1:
+		at91_set_pio_value(I2C1_PORT, SDA1_PIN, bit);
+		break;
+	}
+}
+
+void iic_scl(int bit)
+{
+	switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
+	case 0:
+		at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
+		break;
+	case 1:
+		at91_set_pio_value(I2C1_PORT, SCL1_PIN, bit);
+		break;
+	}
+}
+
+#endif
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 905dd7a0ae..1abd3e5670 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -31,7 +31,6 @@ LIB	= $(obj)libfreescale.o
 
 COBJS-$(CONFIG_FSL_CADMUS)	+= cadmus.o
 COBJS-$(CONFIG_FSL_VIA)		+= cds_via.o
-COBJS-$(CONFIG_FSL_DIU_FB)	+= fsl_diu_fb.o
 COBJS-$(CONFIG_FSL_PIXIS)	+= pixis.o
 COBJS-$(CONFIG_FSL_NGPIXIS)	+= ngpixis.o
 COBJS-$(CONFIG_PQ_MDS_PIB)	+= pq-mds-pib.o
diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c
deleted file mode 100644
index 35ed938bef..0000000000
--- a/board/freescale/common/fsl_diu_fb.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/*
- * Copyright 2007, 2010 Freescale Semiconductor, Inc.
- * York Sun <yorksun@freescale.com>
- *
- * FSL DIU Framebuffer driver
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <malloc.h>
-#include <asm/io.h>
-
-#include <fsl_diu_fb.h>
-
-struct fb_videomode {
-	const char *name;	/* optional */
-	unsigned int refresh;		/* optional */
-	unsigned int xres;
-	unsigned int yres;
-	unsigned int pixclock;
-	unsigned int left_margin;
-	unsigned int right_margin;
-	unsigned int upper_margin;
-	unsigned int lower_margin;
-	unsigned int hsync_len;
-	unsigned int vsync_len;
-	unsigned int sync;
-	unsigned int vmode;
-	unsigned int flag;
-};
-
-#define FB_SYNC_VERT_HIGH_ACT	2	/* vertical sync high active	*/
-#define FB_SYNC_COMP_HIGH_ACT	8	/* composite sync high active   */
-#define FB_VMODE_NONINTERLACED  0	/* non interlaced */
-
-/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
-static struct fb_videomode fsl_diu_mode_800 = {
-	.refresh	= 60,
-	.xres		= 800,
-	.yres		= 480,
-	.pixclock	= 31250,
-	.left_margin	= 86,
-	.right_margin	= 42,
-	.upper_margin	= 33,
-	.lower_margin	= 10,
-	.hsync_len	= 128,
-	.vsync_len	= 2,
-	.sync		= 0,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-/*
- * These parameters give default parameters
- * for video output 1024x768,
- * FIXME - change timing to proper amounts
- * hsync 31.5kHz, vsync 60Hz
- */
-static struct fb_videomode fsl_diu_mode_1024 = {
-	.refresh	= 60,
-	.xres		= 1024,
-	.yres		= 768,
-	.pixclock	= 15385,
-	.left_margin	= 160,
-	.right_margin	= 24,
-	.upper_margin	= 29,
-	.lower_margin	= 3,
-	.hsync_len	= 136,
-	.vsync_len	= 6,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-static struct fb_videomode fsl_diu_mode_1280 = {
-	.name		= "1280x1024-60",
-	.refresh	= 60,
-	.xres		= 1280,
-	.yres		= 1024,
-	.pixclock	= 9375,
-	.left_margin	= 38,
-	.right_margin	= 128,
-	.upper_margin	= 2,
-	.lower_margin	= 7,
-	.hsync_len	= 216,
-	.vsync_len	= 37,
-	.sync		= FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-	.vmode		= FB_VMODE_NONINTERLACED
-};
-
-/*
- * These are the fields of area descriptor(in DDR memory) for every plane
- */
-struct diu_ad {
-	/* Word 0(32-bit) in DDR memory */
-	unsigned int pix_fmt; /* hard coding pixel format */
-	/* Word 1(32-bit) in DDR memory */
-	unsigned int addr;
-	/* Word 2(32-bit) in DDR memory */
-	unsigned int src_size_g_alpha;
-	/* Word 3(32-bit) in DDR memory */
-	unsigned int aoi_size;
-	/* Word 4(32-bit) in DDR memory */
-	unsigned int offset_xyi;
-	/* Word 5(32-bit) in DDR memory */
-	unsigned int offset_xyd;
-	/* Word 6(32-bit) in DDR memory */
-	unsigned int ckmax_r:8;
-	unsigned int ckmax_g:8;
-	unsigned int ckmax_b:8;
-	unsigned int res9:8;
-	/* Word 7(32-bit) in DDR memory */
-	unsigned int ckmin_r:8;
-	unsigned int ckmin_g:8;
-	unsigned int ckmin_b:8;
-	unsigned int res10:8;
-	/* Word 8(32-bit) in DDR memory */
-	unsigned int next_ad;
-	/* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
-	unsigned int res1;
-	unsigned int res2;
-	unsigned int res3;
-}__attribute__ ((packed));
-
-/*
- * DIU register map
- */
-struct diu {
-	unsigned int desc[3];
-	unsigned int gamma;
-	unsigned int pallete;
-	unsigned int cursor;
-	unsigned int curs_pos;
-	unsigned int diu_mode;
-	unsigned int bgnd;
-	unsigned int bgnd_wb;
-	unsigned int disp_size;
-	unsigned int wb_size;
-	unsigned int wb_mem_addr;
-	unsigned int hsyn_para;
-	unsigned int vsyn_para;
-	unsigned int syn_pol;
-	unsigned int thresholds;
-	unsigned int int_status;
-	unsigned int int_mask;
-	unsigned int colorbar[8];
-	unsigned int filling;
-	unsigned int plut;
-} __attribute__ ((packed));
-
-struct diu_hw {
-	struct diu *diu_reg;
-	volatile unsigned int mode;		/* DIU operation mode */
-};
-
-struct diu_addr {
-	unsigned char  *  paddr;	/* Virtual address */
-	unsigned int	   offset;
-};
-
-/*
- * Modes of operation of DIU
- */
-#define MFB_MODE0	0	/* DIU off */
-#define MFB_MODE1	1	/* All three planes output to display */
-#define MFB_MODE2	2	/* Plane 1 to display,
-				 * planes 2+3 written back to memory */
-#define MFB_MODE3	3	/* All three planes written back to memory */
-#define MFB_MODE4	4	/* Color bar generation */
-
-#define MAX_CURS		32
-
-static struct fb_info fsl_fb_info;
-static struct diu_addr gamma, cursor;
-static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
-static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
-static unsigned char *dummy_fb;
-static struct diu_hw dr = {
-	.mode = MFB_MODE1,
-};
-
-int fb_enabled = 0;
-int fb_initialized = 0;
-const int default_xres = 1280;
-const int default_pixel_format = 0x88882317;
-
-static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
-static void enable_lcdc(void);
-static void disable_lcdc(void);
-static int fsl_diu_enable_panel(struct fb_info *info);
-static int fsl_diu_disable_panel(struct fb_info *info);
-static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
-void diu_set_pixel_clock(unsigned int pixclock);
-
-int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
-{
-	struct fb_videomode *fsl_diu_mode_db;
-	struct diu_ad *ad = &fsl_diu_fb_ad;
-	struct diu *hw;
-	struct fb_info *info = &fsl_fb_info;
-	struct fb_var_screeninfo *var = &info->var;
-	unsigned char *gamma_table_base;
-	unsigned int i, j;
-
-	debug("Enter fsl_diu_init\n");
-	dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR);
-	hw = (struct diu *) dr.diu_reg;
-
-	disable_lcdc();
-
-	switch (xres) {
-	case 800:
-		fsl_diu_mode_db = &fsl_diu_mode_800;
-		break;
-	case 1280:
-		fsl_diu_mode_db = &fsl_diu_mode_1280;
-		break;
-	default:
-		fsl_diu_mode_db = &fsl_diu_mode_1024;
-	}
-
-	if (0 == fb_initialized) {
-		allocate_buf(&gamma, 768, 32);
-		debug("gamma is allocated @ 0x%x\n",
-			(unsigned int)gamma.paddr);
-		allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
-		debug("curosr is allocated @ 0x%x\n",
-			(unsigned int)cursor.paddr);
-
-		/* create a dummy fb and dummy ad */
-		dummy_fb = malloc(64);
-		if (NULL == dummy_fb) {
-			printf("Cannot allocate dummy fb\n");
-			return -1;
-		}
-		dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
-		dummy_ad.pix_fmt = 0x88882317;
-		dummy_ad.src_size_g_alpha = 0x04400000;	/* alpha = 0 */
-		dummy_ad.aoi_size = 0x02000400;
-		dummy_ad.offset_xyi = 0;
-		dummy_ad.offset_xyd = 0;
-		dummy_ad.next_ad = 0;
-		/* Memory allocation for framebuffer */
-		if (map_video_memory(info, 32)) {
-			printf("Unable to allocate fb memory 1\n");
-			return -1;
-		}
-	}
-
-	memset(info->screen_base, 0, info->smem_len);
-
-	out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad);
-	out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad);
-	out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad);
-	debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
-	debug("dummy desc[0] = 0x%x\n", hw->desc[0]);
-
-	/* read mode info */
-	var->xres = fsl_diu_mode_db->xres;
-	var->yres = fsl_diu_mode_db->yres;
-	var->bits_per_pixel = 32;
-	var->pixclock = fsl_diu_mode_db->pixclock;
-	var->left_margin = fsl_diu_mode_db->left_margin;
-	var->right_margin = fsl_diu_mode_db->right_margin;
-	var->upper_margin = fsl_diu_mode_db->upper_margin;
-	var->lower_margin = fsl_diu_mode_db->lower_margin;
-	var->hsync_len = fsl_diu_mode_db->hsync_len;
-	var->vsync_len = fsl_diu_mode_db->vsync_len;
-	var->sync = fsl_diu_mode_db->sync;
-	var->vmode = fsl_diu_mode_db->vmode;
-	info->line_length = var->xres * var->bits_per_pixel / 8;
-
-	ad->pix_fmt = pixel_format;
-	ad->addr    = cpu_to_le32((unsigned int)info->screen_base);
-	ad->src_size_g_alpha
-			= cpu_to_le32((var->yres << 12) | var->xres);
-	/* fix me. AOI should not be greater than display size */
-	ad->aoi_size	= cpu_to_le32(( var->yres << 16) |  var->xres);
-	ad->offset_xyi = 0;
-	ad->offset_xyd = 0;
-
-	/* Disable chroma keying function */
-	ad->ckmax_r = 0;
-	ad->ckmax_g = 0;
-	ad->ckmax_b = 0;
-
-	ad->ckmin_r = 255;
-	ad->ckmin_g = 255;
-	ad->ckmin_b = 255;
-
-	gamma_table_base = gamma.paddr;
-	debug("gamma_table_base is allocated @ 0x%x\n",
-		(unsigned int)gamma_table_base);
-
-	/* Prep for DIU init  - gamma table */
-
-	for (i = 0; i <= 2; i++)
-		for (j = 0; j <= 255; j++)
-			*gamma_table_base++ = j;
-
-	if (gamma_fix == 1) {	/* fix the gamma */
-		debug("Fix gamma table\n");
-		gamma_table_base = gamma.paddr;
-		for (i = 0; i < 256*3; i++) {
-			gamma_table_base[i] = (gamma_table_base[i] << 2)
-				| ((gamma_table_base[i] >> 6) & 0x03);
-		}
-	}
-
-	debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
-
-	/* Program DIU registers */
-
-	out_be32(&hw->gamma, (int)gamma.paddr);
-	out_be32(&hw->cursor, (int)cursor.paddr);
-	out_be32(&hw->bgnd, 0x007F7F7F);
-	out_be32(&hw->bgnd_wb, 0);				/* BGND_WB */
-	out_be32(&hw->disp_size, var->yres << 16 | var->xres);	/* DISP SIZE */
-	out_be32(&hw->wb_size, 0);				/* WB SIZE */
-	out_be32(&hw->wb_mem_addr, 0);				/* WB MEM ADDR */
-	out_be32(&hw->hsyn_para, var->left_margin << 22 |	/* BP_H */
-			var->hsync_len << 11   |	/* PW_H */
-			var->right_margin);		/* FP_H */
-
-	out_be32(&hw->vsyn_para, var->upper_margin << 22 |	/* BP_V */
-			var->vsync_len << 11    |	/* PW_V  */
-			var->lower_margin);		/* FP_V  */
-
-	out_be32(&hw->syn_pol, 0);			/* SYNC SIGNALS POLARITY */
-	out_be32(&hw->thresholds, 0x00037800);		/* The Thresholds */
-	out_be32(&hw->int_status, 0);			/* INTERRUPT STATUS */
-	out_be32(&hw->int_mask, 0);			/* INT MASK */
-	out_be32(&hw->plut, 0x01F5F666);
-	/* Pixel Clock configuration */
-	debug("DIU pixclock in ps - %d\n", var->pixclock);
-	diu_set_pixel_clock(var->pixclock);
-
-	fb_initialized = 1;
-
-	/* Enable the DIU */
-	fsl_diu_enable_panel(info);
-	enable_lcdc();
-
-	return 0;
-}
-
-char *fsl_fb_open(struct fb_info **info)
-{
-	*info = &fsl_fb_info;
-	return fsl_fb_info.screen_base;
-}
-
-void fsl_diu_close(void)
-{
-	struct fb_info *info = &fsl_fb_info;
-	fsl_diu_disable_panel(info);
-}
-
-static int fsl_diu_enable_panel(struct fb_info *info)
-{
-	struct diu *hw = dr.diu_reg;
-	struct diu_ad *ad = &fsl_diu_fb_ad;
-
-	debug("Entered: enable_panel\n");
-	if (in_be32(&hw->desc[0]) != (unsigned)ad)
-		out_be32(&hw->desc[0], (unsigned)ad);
-	debug("desc[0] = 0x%x\n", hw->desc[0]);
-	return 0;
-}
-
-static int fsl_diu_disable_panel(struct fb_info *info)
-{
-	struct diu *hw = dr.diu_reg;
-
-	debug("Entered: disable_panel\n");
-	if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad)
-		out_be32(&hw->desc[0], (unsigned)&dummy_ad);
-	return 0;
-}
-
-static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
-{
-	unsigned long offset;
-	unsigned long mask;
-
-	debug("Entered: map_video_memory\n");
-	/* allocate maximum 1280*1024 with 32bpp */
-	info->smem_len = 1280 * 4 *1024 + bytes_align;
-	debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
-	info->screen_base = malloc(info->smem_len);
-	if (info->screen_base == NULL) {
-		printf("Unable to allocate fb memory\n");
-		return -1;
-	}
-	info->smem_start = (unsigned int) info->screen_base;
-	mask = bytes_align - 1;
-	offset = (unsigned long)info->screen_base & mask;
-	if (offset) {
-		info->screen_base += (bytes_align - offset);
-		info->smem_len = info->smem_len - (bytes_align - offset);
-	} else
-		info->smem_len = info->smem_len - bytes_align;
-
-	info->screen_size = info->smem_len;
-
-	debug("Allocated fb @ 0x%08lx, size=%d.\n",
-		info->smem_start, info->smem_len);
-
-	return 0;
-}
-
-static void enable_lcdc(void)
-{
-	struct diu *hw = dr.diu_reg;
-
-	debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
-	if (!fb_enabled) {
-		out_be32(&hw->diu_mode, dr.mode);
-		fb_enabled++;
-	}
-	debug("diu_mode = %d\n", hw->diu_mode);
-}
-
-static void disable_lcdc(void)
-{
-	struct diu *hw = dr.diu_reg;
-
-	debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
-	if (fb_enabled) {
-		out_be32(&hw->diu_mode, 0);
-		fb_enabled = 0;
-	}
-}
-
-/*
- * Align to 64-bit(8-byte), 32-byte, etc.
- */
-static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
-{
-	u32 offset, ssize;
-	u32 mask;
-
-	debug("Entered: allocate_buf\n");
-	ssize = size + bytes_align;
-	buf->paddr = malloc(ssize);
-	if (!buf->paddr)
-		return -1;
-
-	memset(buf->paddr, 0, ssize);
-	mask = bytes_align - 1;
-	offset = (u32)buf->paddr & mask;
-	if (offset) {
-		buf->offset = bytes_align - offset;
-		buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
-	} else
-		buf->offset = 0;
-	return 0;
-}
-
-#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
-#include <stdio_dev.h>
-#include <video_fb.h>
-/*
- * The Graphic Device
- */
-static GraphicDevice ctfb;
-
-void *video_hw_init(void)
-{
-	struct fb_info *info;
-
-	if (platform_diu_init(&ctfb.winSizeX, &ctfb.winSizeY) < 0)
-		return NULL;
-
-	/* fill in Graphic device struct */
-	sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
-		ctfb.winSizeX, ctfb.winSizeY, 32, 64, 60);
-
-	ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info);
-	ctfb.plnSizeX = ctfb.winSizeX;
-	ctfb.plnSizeY = ctfb.winSizeY;
-
-	ctfb.gdfBytesPP = 4;
-	ctfb.gdfIndex = GDF_32BIT_X888RGB;
-
-	ctfb.isaBase = 0;
-	ctfb.pciBase = 0;
-	ctfb.memSize = info->screen_size;
-
-	/* Cursor Start Address */
-	ctfb.dprBase = 0;
-	ctfb.vprBase = 0;
-	ctfb.cprBase = 0;
-
-	return &ctfb;
-}
-#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 812111db10..882ff0bf2d 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -60,9 +60,6 @@ int checkboard(void)
 	return 0;
 }
 
-const char *board_hwconfig = "foo:bar=baz";
-const char *cpu_hwconfig = "foo:bar=baz";
-
 phys_size_t
 initdram(int board_type)
 {
diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c
index 12b40a01ed..8f5305ca1f 100644
--- a/board/freescale/p1022ds/diu.c
+++ b/board/freescale/p1022ds/diu.c
@@ -32,6 +32,7 @@
 
 #define PMUXCR_ELBCDIU_MASK	0xc0000000
 #define PMUXCR_ELBCDIU_NOR16	0x80000000
+#define PMUXCR_ELBCDIU_DIU	0x40000000
 
 /*
  * DIU Area Descriptor
@@ -131,9 +132,8 @@ int platform_diu_init(unsigned int *xres, unsigned int *yres)
 	px_brdcfg0 = in_8(lbc_lcs1_ba);
 	out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU);
 
-	/* Setting PMUXCR to switch to DVI from ELBC */
-	clrsetbits_be32(&gur->pmuxcr,
-		PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_NOR16);
+	/* Set PMUXCR to switch the muxed pins from the LBC to the DIU */
+	clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU);
 	pmuxcr = in_be32(&gur->pmuxcr);
 
 	return fsl_diu_init(*xres, pixel_format, 0);
@@ -161,7 +161,7 @@ static int set_mux_to_lbc(void)
 	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
 
 	/* Switch the muxes only if they're currently set to DIU mode */
-	if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) ==
+	if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
 	    PMUXCR_ELBCDIU_NOR16) {
 		/*
 		 * In DIU mode, the PIXIS can only be accessed indirectly
@@ -216,8 +216,17 @@ void flash_write8(u8 value, void *addr)
 	int sw = set_mux_to_lbc();
 
 	__raw_writeb(value, addr);
-	if (sw)
+	if (sw) {
+		/*
+		 * To ensure the post-write is completed to eLBC, software must
+		 * perform a dummy read from one valid address from eLBC space
+		 * before changing the eLBC_DIU from NOR mode to DIU mode.
+		 * set_mux_to_diu() includes a sync that will ensure the
+		 * __raw_readb() completes before it switches the mux.
+		 */
+		__raw_readb(addr);
 		set_mux_to_diu();
+	}
 }
 
 void flash_write16(u16 value, void *addr)
@@ -225,8 +234,17 @@ void flash_write16(u16 value, void *addr)
 	int sw = set_mux_to_lbc();
 
 	__raw_writew(value, addr);
-	if (sw)
+	if (sw) {
+		/*
+		 * To ensure the post-write is completed to eLBC, software must
+		 * perform a dummy read from one valid address from eLBC space
+		 * before changing the eLBC_DIU from NOR mode to DIU mode.
+		 * set_mux_to_diu() includes a sync that will ensure the
+		 * __raw_readb() completes before it switches the mux.
+		 */
+		__raw_readb(addr);
 		set_mux_to_diu();
+	}
 }
 
 void flash_write32(u32 value, void *addr)
@@ -234,18 +252,47 @@ void flash_write32(u32 value, void *addr)
 	int sw = set_mux_to_lbc();
 
 	__raw_writel(value, addr);
-	if (sw)
+	if (sw) {
+		/*
+		 * To ensure the post-write is completed to eLBC, software must
+		 * perform a dummy read from one valid address from eLBC space
+		 * before changing the eLBC_DIU from NOR mode to DIU mode.
+		 * set_mux_to_diu() includes a sync that will ensure the
+		 * __raw_readb() completes before it switches the mux.
+		 */
+		__raw_readb(addr);
 		set_mux_to_diu();
+	}
 }
 
 void flash_write64(u64 value, void *addr)
 {
 	int sw = set_mux_to_lbc();
+	uint32_t *p = addr;
 
-	/* There is no __raw_writeq(), so do the write manually */
-	*(volatile u64 *)addr = value;
-	if (sw)
+	/*
+	 * There is no __raw_writeq(), so do the write manually.  We don't trust
+	 * the compiler, so we use inline assembly.
+	 */
+	__asm__ __volatile__(
+		"stw%U0%X0 %2,%0;\n"
+		"stw%U1%X1 %3,%1;\n"
+		: "=m" (*p), "=m" (*(p + 1))
+		: "r" ((uint32_t) (value >> 32)), "r" ((uint32_t) (value)));
+
+	if (sw) {
+		/*
+		 * To ensure the post-write is completed to eLBC, software must
+		 * perform a dummy read from one valid address from eLBC space
+		 * before changing the eLBC_DIU from NOR mode to DIU mode.  We
+		 * read addr+4 because we just wrote to addr+4, so that's how we
+		 * maintain execution order.  set_mux_to_diu() includes a sync
+		 * that will ensure the __raw_readb() completes before it
+		 * switches the mux.
+		 */
+		__raw_readb(addr + 4);
 		set_mux_to_diu();
+	}
 }
 
 u8 flash_read8(void *addr)
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index b507677c3f..b05ef989b9 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -69,9 +69,6 @@ int checkboard(void)
 	return 0;
 }
 
-const char *board_hwconfig = "foo:bar=baz";
-const char *cpu_hwconfig = "foo:bar=baz";
-
 phys_size_t initdram(int board_type)
 {
 	phys_size_t dram_size = 0;
diff --git a/board/logicpd/am3517evm/config.mk b/board/logicpd/am3517evm/config.mk
index 102d32b913..71ec5d0b14 100644
--- a/board/logicpd/am3517evm/config.mk
+++ b/board/logicpd/am3517evm/config.mk
@@ -27,4 +27,4 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/logicpd/zoom1/config.mk b/board/logicpd/zoom1/config.mk
index 39a94dc4ca..e89de31c91 100644
--- a/board/logicpd/zoom1/config.mk
+++ b/board/logicpd/zoom1/config.mk
@@ -30,4 +30,4 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/logicpd/zoom2/config.mk b/board/logicpd/zoom2/config.mk
index 8a8adc785a..9f3f57d6ff 100644
--- a/board/logicpd/zoom2/config.mk
+++ b/board/logicpd/zoom2/config.mk
@@ -30,4 +30,4 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/ronetix/pm9261/config.mk b/board/ronetix/pm9261/config.mk
deleted file mode 100644
index 975522a891..0000000000
--- a/board/ronetix/pm9261/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f00000
\ No newline at end of file
diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c
index 53d8c48281..e0f44ddd15 100644
--- a/board/ronetix/pm9261/pm9261.c
+++ b/board/ronetix/pm9261/pm9261.c
@@ -281,9 +281,16 @@ int board_eth_init(bd_t *bis)
 
 int dram_init(void)
 {
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
+				PHYS_SDRAM_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/ronetix/pm9263/config.mk b/board/ronetix/pm9263/config.mk
deleted file mode 100644
index e554a45007..0000000000
--- a/board/ronetix/pm9263/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x23f00000
diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c
index 4dc0237b9e..ec9f865915 100644
--- a/board/ronetix/pm9263/pm9263.c
+++ b/board/ronetix/pm9263/pm9263.c
@@ -378,9 +378,16 @@ int board_init(void)
 
 int dram_init(void)
 {
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
+				PHYS_SDRAM_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/ronetix/pm9g45/config.mk b/board/ronetix/pm9g45/config.mk
deleted file mode 100644
index 9d3c5ae277..0000000000
--- a/board/ronetix/pm9g45/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x73f00000
diff --git a/board/ronetix/pm9g45/pm9g45.c b/board/ronetix/pm9g45/pm9g45.c
index f3d48f233e..79b7c9d2ee 100644
--- a/board/ronetix/pm9g45/pm9g45.c
+++ b/board/ronetix/pm9g45/pm9g45.c
@@ -159,9 +159,16 @@ int board_init(void)
 
 int dram_init(void)
 {
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM,
+				PHYS_SDRAM_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
-	return 0;
 }
 
 #ifdef CONFIG_RESET_PHY_R
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 0b09ebaf89..581935d054 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -43,14 +43,20 @@ int board_init(void)
 
 int dram_init(void)
 {
+	gd->ram_size = PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE +
+			PHYS_SDRAM_3_SIZE;
+
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
 	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
 	gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
-
-	return 0;
 }
 
 #ifdef CONFIG_DISPLAY_BOARDINFO
diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c
index 31e8d9e0ec..d3189f6b78 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -65,13 +65,17 @@ int board_init(void)
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
-						PHYS_SDRAM_1_SIZE);
+	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
 
 	return 0;
 }
 
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
 #ifdef CONFIG_DISPLAY_BOARDINFO
 int checkboard(void)
 {
diff --git a/board/ti/sdp3430/config.mk b/board/ti/sdp3430/config.mk
index 2ca03dd81f..be4629897a 100644
--- a/board/ti/sdp3430/config.mk
+++ b/board/ti/sdp3430/config.mk
@@ -30,4 +30,4 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80e80000
+CONFIG_SYS_TEXT_BASE = 0x80008000