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author | Pankaj Bansal <pankaj.bansal@nxp.com> | 2019-07-17 12:34:34 +0300 |
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committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-08-22 06:37:36 +0300 |
commit | 2e35d07658c885c604048f43eb7d562840843c7d (patch) | |
tree | 925b81173ae2d8149a459f1d1117e5d23e03e167 /board | |
parent | 67d3a815cb89ca349be5a0c9b02c4118a9a3a20e (diff) | |
download | u-boot-2e35d07658c885c604048f43eb7d562840843c7d.tar.xz |
boards: fsl: lx2160ardb: enable flexcan
Flexcan in LX2160ARDB is controlled by FPGA register boardcfg4
bit 5. enable this bit so that flexcan is enabled in LX2160ARDB.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/freescale/lx2160a/lx2160a.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 163b42dda4..7f19a1a145 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -410,6 +410,26 @@ int config_board_mux(void) return 0; } +#elif defined(CONFIG_TARGET_LX2160ARDB) +int config_board_mux(void) +{ + u8 brdcfg; + + brdcfg = QIXIS_READ(brdcfg[4]); + /* The BRDCFG4 register controls general board configuration. + *|-------------------------------------------| + *|Field | Function | + *|-------------------------------------------| + *|5 | CAN I/O Enable (net CFG_CAN_EN_B):| + *|CAN_EN | 0= CAN transceivers are disabled. | + *| | 1= CAN transceivers are enabled. | + *|-------------------------------------------| + */ + brdcfg |= BIT_MASK(5); + QIXIS_WRITE(brdcfg[4], brdcfg); + + return 0; +} #else int config_board_mux(void) { |