diff options
| author | Samin Guo <samin.guo@linux.starfivetech.com> | 2022-10-11 05:40:16 +0300 |
|---|---|---|
| committer | Jianlong Huang <jianlong.huang@starfivetech.com> | 2022-11-03 11:31:42 +0300 |
| commit | b949c9b66c4d453ed0d454c7b5ee5c0aea280c28 (patch) | |
| tree | f19adaf6f04791ec4efe7409ec480407f73c2e3a /board | |
| parent | d4cfd564c23afae9efeb44a12d6a2be50b17d912 (diff) | |
| download | u-boot-b949c9b66c4d453ed0d454c7b5ee5c0aea280c28.tar.xz | |
spl:starfive:jh7110: Improved GMAC0 TX I/O PAD capability
JH7110B requires a higher IOPAD capability in 1000M mode.
Signed-off-by: Samin Guo <samin.guo@linux.starfivetech.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/starfive/visionfive2/spl.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c index ce275bbfe3..60181d6736 100644 --- a/board/starfive/visionfive2/spl.c +++ b/board/starfive/visionfive2/spl.c @@ -93,6 +93,12 @@ void board_init_f(ulong dummy) CLK_QSPI_REF_SW_MASK, (0 << CLK_QSPI_REF_SW_SHIFT) & CLK_QSPI_REF_SW_MASK); + /* Improved GMAC0 TX I/O PAD capability */ + clrsetbits_le32(AON_IOMUX_BASE + 0x78, 0x3, BIT(0) & 0x3); + clrsetbits_le32(AON_IOMUX_BASE + 0x7c, 0x3, BIT(0) & 0x3); + clrsetbits_le32(AON_IOMUX_BASE + 0x80, 0x3, BIT(0) & 0x3); + clrsetbits_le32(AON_IOMUX_BASE + 0x84, 0x3, BIT(0) & 0x3); + clrsetbits_le32(AON_IOMUX_BASE + 0x88, 0x3, BIT(0) & 0x3); /*set GPIO to 3.3v*/ setbits_le32(SYS_SYSCON_BASE + 0xC, 0x0); |