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author | Samin Guo <samin.guo@starfivetech.com> | 2023-04-03 06:29:25 +0300 |
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committer | Samin Guo <samin.guo@starfivetech.com> | 2023-04-03 06:44:56 +0300 |
commit | d72ca8695b3d3ac1c201aeedb74b70b138ea9ff4 (patch) | |
tree | a6cedb78e8d85631b895d9645f3f07746ce749e9 /board | |
parent | 479dc3cb7e4c5c5a2103ff1663971c2a38a163ac (diff) | |
download | u-boot-d72ca8695b3d3ac1c201aeedb74b70b138ea9ff4.tar.xz |
board: starfive: jh7110-vf2: remove l2 pretcher in borad cfg
It should be configured in L2.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/starfive/visionfive2/starfive_visionfive2.c | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c index e1fe6b2e46..db67c4dc49 100644 --- a/board/starfive/visionfive2/starfive_visionfive2.c +++ b/board/starfive/visionfive2/starfive_visionfive2.c @@ -332,25 +332,6 @@ static void get_cpu_voltage_type(struct udevice *dev) } #endif -/*enable U74-mc hart1~hart4 prefetcher*/ -static void enable_prefetcher(void) -{ - u32 hart; - u32 *reg; -#define L2_PREFETCHER_BASE_ADDR 0x2030000 -#define L2_PREFETCHER_OFFSET 0x2000 - - /*hart1~hart4*/ - for (hart = 1; hart < 5; hart++) { - reg = (u32 *)((u64)(L2_PREFETCHER_BASE_ADDR - + hart*L2_PREFETCHER_OFFSET)); - - mb(); /* memory barrier */ - setbits_le32(reg, 0x1); - mb(); /* memory barrier */ - } -} - static void jh7110_jtag_init(void) { /*jtag*/ @@ -430,9 +411,6 @@ int board_init(void) { enable_caches(); - /*enable hart1-hart4 prefetcher*/ - enable_prefetcher(); - jh7110_jtag_init(); jh7110_timer_init(); |