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| author | Neha Malcom Francis <n-francis@ti.com> | 2023-07-21 21:44:36 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-07-22 02:36:58 +0300 |
| commit | 106589aae7dffcd79c99b8c0176423cfbd78d6d9 (patch) | |
| tree | 9d5d79e546ee5f11c923bbd558bd86bbf754a65e /board | |
| parent | 267a4845c9c0d12f35a4115524137adcae17f494 (diff) | |
| download | u-boot-106589aae7dffcd79c99b8c0176423cfbd78d6d9.tar.xz | |
j721s2: dts: binman: Package tiboot3.bin, tispl.bin and u-boot.img
Support has been added for both HS-SE, HS-FS and GP images.
HS-SE:
* tiboot3-j721s2-hs-evm.bin
* tispl.bin
* u-boot.img
HS-FS:
* tiboot3-j721s2-hs-fs-evm.bin
* tispl.bin
* u-boot.img
GP:
* tiboot3.bin --> tiboot3-j721s2-gp-evm.bin
* tispl.bin_unsigned
* u-boot.img_unsigned
It is to be noted that the bootflow followed by J721S2 requires:
tiboot3.bin:
* R5 SPL
* R5 SPL dtbs
* TIFS
* board-cfg
* pm-cfg
* sec-cfg
* rm-cfg
tispl.bin:
* DM
* ATF
* OP-TEE
* A72 SPL
* A72 SPL dtbs
u-boot.img:
* A72 U-Boot
* A72 U-Boot dtbs
Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/ti/j721s2/Kconfig | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig index a24641f8cf..f6d1cb5765 100644 --- a/board/ti/j721s2/Kconfig +++ b/board/ti/j721s2/Kconfig @@ -13,6 +13,7 @@ config TARGET_J721S2_A72_EVM select BOARD_LATE_INIT imply TI_I2C_BOARD_DETECT select SYS_DISABLE_DCACHE_OPS + select BINMAN config TARGET_J721S2_R5_EVM bool "TI K3 based J721S2 EVM running on R5" @@ -22,6 +23,7 @@ config TARGET_J721S2_R5_EVM select RAM select SPL_RAM select K3_DDRSS + select BINMAN imply SYS_K3_SPL_ATF imply TI_I2C_BOARD_DETECT |