diff options
| author | Chris Packham <judge.packham@gmail.com> | 2023-07-10 01:47:36 +0300 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2023-07-13 16:53:57 +0300 |
| commit | 4c97c4b5901cbbf8ed08eaf8c4f0b5f401c705c6 (patch) | |
| tree | e509a4e6f59c5a511aa2b6a64df3bd174cc170fd /board | |
| parent | e6719fab6cdbc93f1cbe05ae6f5b031cb7e07928 (diff) | |
| download | u-boot-4c97c4b5901cbbf8ed08eaf8c4f0b5f401c705c6.tar.xz | |
arm: mvebu: Add Allied Telesis x240 board
The x240 and SE240 are a series of L2+ switches from Allied Telesis.
There are a number of them in the range but as far as U-Boot is
concerned all the CPU block components are the same so there's only one
board defined.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
| -rw-r--r-- | board/alliedtelesis/x240/MAINTAINERS | 7 | ||||
| -rw-r--r-- | board/alliedtelesis/x240/Makefile | 6 | ||||
| -rw-r--r-- | board/alliedtelesis/x240/x240.c | 13 |
3 files changed, 26 insertions, 0 deletions
diff --git a/board/alliedtelesis/x240/MAINTAINERS b/board/alliedtelesis/x240/MAINTAINERS new file mode 100644 index 0000000000..f1f78d9616 --- /dev/null +++ b/board/alliedtelesis/x240/MAINTAINERS @@ -0,0 +1,7 @@ +X240 BOARD +M: Chris Packham <chris.packham@alliedtelesis.co.nz> +S: Maintained +F: board/alliedtelesis/x240/ +F: arch/arm/dts/ac5-98dx35xx-rd.dts +F: include/configs/x240.h +F: configs/x240_defconfig diff --git a/board/alliedtelesis/x240/Makefile b/board/alliedtelesis/x240/Makefile new file mode 100644 index 0000000000..7f20a47d6a --- /dev/null +++ b/board/alliedtelesis/x240/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2022 Allied Telesis +# + +obj-y += x240.o diff --git a/board/alliedtelesis/x240/x240.c b/board/alliedtelesis/x240/x240.c new file mode 100644 index 0000000000..0c4f8e03b8 --- /dev/null +++ b/board/alliedtelesis/x240/x240.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; + + return 0; +} |