diff options
| author | Tom Rini <trini@konsulko.com> | 2022-12-03 00:42:48 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-22 18:31:49 +0300 |
| commit | 8747decc9bda5512c2d7eff4c7cab178e5ad6152 (patch) | |
| tree | f5e6299890bca313ad78b4f7e90786314b20b0d9 /board | |
| parent | 4fd9373bbb3f160c2975fc9de2fab49040141833 (diff) | |
| download | u-boot-8747decc9bda5512c2d7eff4c7cab178e5ad6152.tar.xz | |
net: vsc9953: Remove this driver
No platforms enable this driver as there's no T1040D4RDB nor T1040RDB
support at this time. Remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/t104xrdb/eth.c | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index fe51d68c7b..c011aa96fb 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -22,10 +22,6 @@ int board_eth_init(struct bd_info *bis) struct memac_mdio_info memac_mdio_info; unsigned int i; int phy_addr = 0; -#ifdef CONFIG_VSC9953 - phy_interface_t phy_int; - struct mii_dev *bus; -#endif printf("Initializing Fman\n"); @@ -107,48 +103,6 @@ int board_eth_init(struct bd_info *bis) DEFAULT_FM_MDIO_NAME)); } -#ifdef CONFIG_VSC9953 - /* SerDes configured for QSGMII */ - if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A) >= 0) { - for (i = 0; i < 4; i++) { - bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); - phy_addr = CFG_SYS_FM1_QSGMII11_PHY_ADDR + i; - phy_int = PHY_INTERFACE_MODE_QSGMII; - - vsc9953_port_info_set_mdio(i, bus); - vsc9953_port_info_set_phy_address(i, phy_addr); - vsc9953_port_info_set_phy_int(i, phy_int); - vsc9953_port_enable(i); - } - } - if (serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_B) >= 0) { - for (i = 4; i < 8; i++) { - bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); - phy_addr = CFG_SYS_FM1_QSGMII21_PHY_ADDR + i - 4; - phy_int = PHY_INTERFACE_MODE_QSGMII; - - vsc9953_port_info_set_mdio(i, bus); - vsc9953_port_info_set_phy_address(i, phy_addr); - vsc9953_port_info_set_phy_int(i, phy_int); - vsc9953_port_enable(i); - } - } - - /* Connect DTSEC1 to L2 switch if it doesn't have a PHY */ - if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1) < 0) - vsc9953_port_enable(8); - - /* Connect DTSEC2 to L2 switch if it doesn't have a PHY */ - if (serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC2) < 0) { - /* Enable L2 On MAC2 using SCFG */ - struct ccsr_scfg *scfg = (struct ccsr_scfg *) - CFG_SYS_MPC85xx_SCFG; - - out_be32(&scfg->esgmiiselcr, in_be32(&scfg->esgmiiselcr) | - (0x80000000)); - vsc9953_port_enable(9); - } -#endif cpu_eth_init(bis); #endif |