diff options
author | Marek Vasut <marex@denx.de> | 2022-09-19 22:37:07 +0300 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2022-09-20 19:30:02 +0300 |
commit | fdf6bbb260c36bb54826bffb4dd4d62b90c3cede (patch) | |
tree | cca0acaf01010a37908c5fed7ee34aaad6a9a697 /board | |
parent | 9bf0cbf396beaf3257698f672207ab7849134618 (diff) | |
download | u-boot-fdf6bbb260c36bb54826bffb4dd4d62b90c3cede.tar.xz |
ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock
Pull this LPGPR unlock into common code, since it is used in multiple
systems already.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c | 17 | ||||
-rw-r--r-- | board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c | 17 | ||||
-rw-r--r-- | board/menlo/mx8menlo/mx8menlo.c | 17 |
3 files changed, 0 insertions, 51 deletions
diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c index 6dc4e6a9a2..dc0883002c 100644 --- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c +++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c @@ -34,22 +34,6 @@ int board_phys_sdram_size(phys_size_t *size) return 0; } -/* IMX8M SNVS registers needed for the bootcount functionality */ -#define SNVS_BASE_ADDR 0x30370000 -#define SNVS_LPSR 0x4c -#define SNVS_LPLVDR 0x64 -#define SNVS_LPPGDR_INIT 0x41736166 - -static void setup_snvs(void) -{ - /* Enable SNVS clock */ - clock_enable(CCGR_SNVS, 1); - /* Initialize glitch detect */ - writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); - /* Clear interrupt status */ - writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); -} - static void setup_mac_address(void) { unsigned char enetaddr[6]; @@ -99,7 +83,6 @@ static void setup_boot_device(void) int board_init(void) { - setup_snvs(); return 0; } diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c index 6f06daf86f..9d8e19d994 100644 --- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c +++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c @@ -37,22 +37,6 @@ int board_phys_sdram_size(phys_size_t *size) return 0; } -/* IMX8M SNVS registers needed for the bootcount functionality */ -#define SNVS_BASE_ADDR 0x30370000 -#define SNVS_LPSR 0x4c -#define SNVS_LPLVDR 0x64 -#define SNVS_LPPGDR_INIT 0x41736166 - -static void setup_snvs(void) -{ - /* Enable SNVS clock */ - clock_enable(CCGR_SNVS, 1); - /* Initialize glitch detect */ - writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); - /* Clear interrupt status */ - writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); -} - static void setup_eqos(void) { struct iomuxc_gpr_base_regs *gpr = @@ -145,7 +129,6 @@ int board_init(void) { setup_eqos(); setup_fec(); - setup_snvs(); return 0; } diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c index 9d3708a363..61fc4ec85f 100644 --- a/board/menlo/mx8menlo/mx8menlo.c +++ b/board/menlo/mx8menlo/mx8menlo.c @@ -12,24 +12,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <spl.h> -#define SNVS_BASE_ADDR 0x30370000 -#define SNVS_LPSR 0x4c -#define SNVS_LPLVDR 0x64 -#define SNVS_LPPGDR_INIT 0x41736166 - -static void setup_snvs(void) -{ - /* Enable SNVS clock */ - clock_enable(CCGR_SNVS, 1); - /* Initialize glitch detect */ - writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); - /* Clear interrupt status */ - writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); -} - void board_early_init(void) { init_uart_clk(1); - - setup_snvs(); } |