Merge branch 'next'

Signed-off-by: Tom Rini <trini@konsulko.com>

63 files changed, 362 insertions, 263 deletions

diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 2202eb8cfb..3eb5cb4256 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -41,22 +41,14 @@
 #define ARMADA_37XX_SPI_DOUT	(MVEBU_REGISTER(0x10608))
 #define ARMADA_37XX_SPI_DIN	(MVEBU_REGISTER(0x1060c))
 
-#define ETH1_PATH	"/soc/internal-regs@d0000000/ethernet@40000"
-#define MDIO_PATH	"/soc/internal-regs@d0000000/mdio@32004"
-#define SFP_GPIO_PATH	"/soc/internal-regs@d0000000/spi@10600/moxtet@1/gpio@0"
-#define PCIE_PATH	"/soc/pcie@d0070000"
-#define SFP_PATH	"/sfp"
-#define LED_PATH	"/leds/led"
-#define BUTTON_PATH	"/gpio-keys/reset"
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_OF_BOARD_FIXUP)
 int board_fix_fdt(void *blob)
 {
+	enum fdt_status status_pcie, status_eth1;
 	u8 topology[MAX_MOX_MODULES];
-	int i, size, node;
-	bool enable;
+	int i, size, ret;
 
 	/*
 	 * SPI driver is not loaded in driver model yet, but we have to find out
@@ -64,15 +56,20 @@ int board_fix_fdt(void *blob)
 	 * to read SPI by reading/writing SPI registers directly
 	 */
 
-	writel(0x10df, ARMADA_37XX_SPI_CFG);
 	/* put pin from GPIO to SPI mode */
 	clrbits_le32(ARMADA_37XX_NB_GPIO_SEL, BIT(12));
+	/* configure cpol, cpha, prescale */
+	writel(0x10df, ARMADA_37XX_SPI_CFG);
+	mdelay(1);
 	/* enable SPI CS1 */
 	setbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
 
 	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
 		udelay(1);
 
+	status_pcie = FDT_STATUS_DISABLED;
+	status_eth1 = FDT_STATUS_DISABLED;
+
 	for (i = 0; i < MAX_MOX_MODULES; ++i) {
 		writel(0x0, ARMADA_37XX_SPI_DOUT);
 
@@ -84,6 +81,11 @@ int board_fix_fdt(void *blob)
 			break;
 
 		topology[i] &= 0xf;
+
+		if (topology[i] == MOX_MODULE_SFP ||
+		    topology[i] == MOX_MODULE_TOPAZ ||
+		    topology[i] == MOX_MODULE_PERIDOT)
+			status_eth1 = FDT_STATUS_OKAY;
 	}
 
 	size = i;
@@ -91,24 +93,21 @@ int board_fix_fdt(void *blob)
 	/* disable SPI CS1 */
 	clrbits_le32(ARMADA_37XX_SPI_CTRL, BIT(17));
 
+	ret = fdt_set_status_by_alias(blob, "ethernet1", status_eth1);
+	if (ret < 0)
+		printf("Cannot set status for eth1 in U-Boot's device tree: %s!\n",
+		       fdt_strerror(ret));
+
 	if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
 			 topology[1] == MOX_MODULE_USB3 ||
 			 topology[1] == MOX_MODULE_PASSPCI))
-		enable = true;
-	else
-		enable = false;
-
-	node = fdt_path_offset(blob, PCIE_PATH);
-
-	if (node < 0) {
-		printf("Cannot find PCIe node in U-Boot's device tree!\n");
-		return 0;
-	}
+		status_pcie = FDT_STATUS_OKAY;
 
-	if (fdt_setprop_string(blob, node, "status",
-			       enable ? "okay" : "disabled") < 0) {
-		printf("Cannot %s PCIe in U-Boot's device tree!\n",
-		       enable ? "enable" : "disable");
+	ret = fdt_set_status_by_compatible(blob, "marvell,armada-3700-pcie",
+					   status_pcie);
+	if (ret < 0) {
+		printf("Cannot set status for PCIe in U-Boot's device tree: %s!\n",
+		       fdt_strerror(ret));
 		return 0;
 	}
 
@@ -416,12 +415,18 @@ static bool read_reset_button(void)
 	struct udevice *button, *led;
 	int i;
 
-	if (device_get_global_by_ofnode(ofnode_path(BUTTON_PATH), &button)) {
+	if (device_get_global_by_ofnode(
+			ofnode_first_subnode(ofnode_by_compatible(ofnode_null(),
+								  "gpio-keys")),
+			&button)) {
 		printf("Cannot find reset button!\n");
 		return false;
 	}
 
-	if (device_get_global_by_ofnode(ofnode_path(LED_PATH), &led)) {
+	if (device_get_global_by_ofnode(
+			ofnode_first_subnode(ofnode_by_compatible(ofnode_null(),
+								  "gpio-leds")),
+			&led)) {
 		printf("Cannot find status LED!\n");
 		return false;
 	}
@@ -607,9 +612,6 @@ int show_board_info(void)
 		}
 	}
 
-	if (module_count)
-		printf("\n");
-
 	return 0;
 }
 
@@ -664,92 +666,34 @@ handle_reset_btn:
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 
-static int vnode_by_path(void *blob, const char *fmt, va_list ap)
+static bool is_topaz(int id)
 {
-	char path[128];
-
-	vsnprintf(path, 128, fmt, ap);
-	return fdt_path_offset(blob, path);
+	return topaz && id == peridot + topaz - 1;
 }
 
-static int node_by_path(void *blob, const char *fmt, ...)
+static int switch_addr(int id)
 {
-	va_list ap;
-	int res;
-
-	va_start(ap, fmt);
-	res = vnode_by_path(blob, fmt, ap);
-	va_end(ap);
-
-	return res;
+	return is_topaz(id) ? 0x2 : 0x10 + id;
 }
 
-static int phandle_by_path(void *blob, const char *fmt, ...)
+static int setup_switch(void *blob, int id)
 {
-	va_list ap;
-	int node, phandle, res;
-
-	va_start(ap, fmt);
-	node = vnode_by_path(blob, fmt, ap);
-	va_end(ap);
+	int res, addr, i, node;
+	char mdio_path[64];
 
+	node = fdt_node_offset_by_compatible(blob, -1, "marvell,orion-mdio");
 	if (node < 0)
 		return node;
 
-	phandle = fdt_get_phandle(blob, node);
-	if (phandle > 0)
-		return phandle;
-
-	phandle = fdt_get_max_phandle(blob);
-	if (phandle < 0)
-		return phandle;
-
-	phandle += 1;
-
-	res = fdt_setprop_u32(blob, node, "linux,phandle", phandle);
+	res = fdt_get_path(blob, node, mdio_path, sizeof(mdio_path));
 	if (res < 0)
 		return res;
 
-	res = fdt_setprop_u32(blob, node, "phandle", phandle);
-	if (res < 0)
-		return res;
-
-	return phandle;
-}
-
-static int enable_by_path(void *blob, const char *fmt, ...)
-{
-	va_list ap;
-	int node;
-
-	va_start(ap, fmt);
-	node = vnode_by_path(blob, fmt, ap);
-	va_end(ap);
-
-	if (node < 0)
-		return node;
-
-	return fdt_setprop_string(blob, node, "status", "okay");
-}
-
-static bool is_topaz(int id)
-{
-	return topaz && id == peridot + topaz - 1;
-}
-
-static int switch_addr(int id)
-{
-	return is_topaz(id) ? 0x2 : 0x10 + id;
-}
-
-static int setup_switch(void *blob, int id)
-{
-	int res, addr, i, node, phandle;
-
 	addr = switch_addr(id);
 
 	/* first enable the switch by setting status = "okay" */
-	res = enable_by_path(blob, MDIO_PATH "/switch%i@%x", id, addr);
+	res = fdt_status_okay_by_pathf(blob, "%s/switch%i@%x", mdio_path, id,
+				       addr);
 	if (res < 0)
 		return res;
 
@@ -758,13 +702,13 @@ static int setup_switch(void *blob, int id)
 	 * enable corresponding ports
 	 */
 	if (id < peridot + topaz - 1) {
-		res = enable_by_path(blob,
-				     MDIO_PATH "/switch%i@%x/ports/port@a",
-				     id, addr);
+		res = fdt_status_okay_by_pathf(blob,
+					       "%s/switch%i@%x/ports/port@a",
+					       mdio_path, id, addr);
 	} else if (id == peridot - 1 && !topaz && sfp) {
-		res = enable_by_path(blob,
-				     MDIO_PATH "/switch%i@%x/ports/port-sfp@a",
-				     id, addr);
+		res = fdt_status_okay_by_pathf(blob,
+					       "%s/switch%i@%x/ports/port-sfp@a",
+					       mdio_path, id, addr);
 	} else {
 		res = 0;
 	}
@@ -775,18 +719,21 @@ static int setup_switch(void *blob, int id)
 		return 0;
 
 	/* finally change link property if needed */
-	node = node_by_path(blob, MDIO_PATH "/switch%i@%x/ports/port@a", id,
-			    addr);
+	node = fdt_node_offset_by_pathf(blob, "%s/switch%i@%x/ports/port@a",
+					mdio_path, id, addr);
 	if (node < 0)
 		return node;
 
 	for (i = id + 1; i < peridot + topaz; ++i) {
-		phandle = phandle_by_path(blob,
-					  MDIO_PATH "/switch%i@%x/ports/port@%x",
-					  i, switch_addr(i),
-					  is_topaz(i) ? 5 : 9);
-		if (phandle < 0)
-			return phandle;
+		unsigned int phandle;
+
+		phandle = fdt_create_phandle_by_pathf(blob,
+						      "%s/switch%i@%x/ports/port@%x",
+						      mdio_path, i,
+						      switch_addr(i),
+						      is_topaz(i) ? 5 : 9);
+		if (!phandle)
+			return -FDT_ERR_NOPHANDLES;
 
 		if (i == id + 1)
 			res = fdt_setprop_u32(blob, node, "link", phandle);
@@ -799,38 +746,17 @@ static int setup_switch(void *blob, int id)
 	return 0;
 }
 
-static int remove_disabled_nodes(void *blob)
-{
-	while (1) {
-		int res, offset;
-
-		offset = fdt_node_offset_by_prop_value(blob, -1, "status",
-						       "disabled", 9);
-		if (offset < 0)
-			break;
-
-		res = fdt_del_node(blob, offset);
-		if (res < 0)
-			return res;
-	}
-
-	return 0;
-}
-
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-	int node, phandle, res;
+	int res;
 
 	/*
 	 * If MOX B (PCI), MOX F (USB) or MOX G (Passthrough PCI) modules are
 	 * connected, enable the PCIe node.
 	 */
 	if (pci || usb || passpci) {
-		node = fdt_path_offset(blob, PCIE_PATH);
-		if (node < 0)
-			return node;
-
-		res = fdt_setprop_string(blob, node, "status", "okay");
+		res = fdt_status_okay_by_compatible(blob,
+						    "marvell,armada-3700-pcie");
 		if (res < 0)
 			return res;
 
@@ -847,7 +773,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	if (peridot || topaz) {
 		int i;
 
-		res = enable_by_path(blob, ETH1_PATH);
+		res = fdt_status_okay_by_alias(blob, "ethernet1");
 		if (res < 0)
 			return res;
 
@@ -865,20 +791,25 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	 * Also enable and configure SFP GPIO controller node.
 	 */
 	if (sfp) {
-		res = enable_by_path(blob, SFP_PATH);
+		int node;
+
+		res = fdt_status_okay_by_compatible(blob, "sff,sfp");
 		if (res < 0)
 			return res;
 
-		res = enable_by_path(blob, ETH1_PATH);
+		res = fdt_status_okay_by_alias(blob, "ethernet1");
 		if (res < 0)
 			return res;
 
 		if (!peridot) {
-			phandle = phandle_by_path(blob, SFP_PATH);
-			if (phandle < 0)
-				return res;
+			unsigned int phandle;
+
+			phandle = fdt_create_phandle_by_compatible(blob,
+								   "sff,sfp");
+			if (!phandle)
+				return -FDT_ERR_NOPHANDLES;
 
-			node = node_by_path(blob, ETH1_PATH);
+			node = fdt_path_offset(blob, "ethernet1");
 			if (node < 0)
 				return node;
 
@@ -892,7 +823,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 				return res;
 		}
 
-		res = enable_by_path(blob, SFP_GPIO_PATH);
+		res = fdt_status_okay_by_compatible(blob, "cznic,moxtet-gpio");
 		if (res < 0)
 			return res;
 
@@ -900,7 +831,8 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 			char newname[16];
 
 			/* moxtet-sfp is on non-zero position, change default */
-			node = node_by_path(blob, SFP_GPIO_PATH);
+			node = fdt_node_offset_by_compatible(blob, -1,
+							     "cznic,moxtet-gpio");
 			if (node < 0)
 				return node;
 
@@ -919,7 +851,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	fdt_fixup_ethernet(blob);
 
 	/* Finally remove disabled nodes, as per Rob Herring's request. */
-	remove_disabled_nodes(blob);
+	fdt_delete_disabled_nodes(blob);
 
 	return 0;
 }
diff --git a/board/LaCie/net2big_v2/Kconfig b/board/LaCie/net2big_v2/Kconfig
index ba460dba45..758d25e007 100644
--- a/board/LaCie/net2big_v2/Kconfig
+++ b/board/LaCie/net2big_v2/Kconfig
@@ -1,5 +1,16 @@
 if TARGET_NET2BIG_V2
 
+choice
+	prompt "Board variant"
+
+config D2NET_V2
+	bool "D2NET v2"
+
+config NET2BIG_V2
+	bool "NET2BIG v2"
+
+endchoice
+
 config SYS_BOARD
 	default "net2big_v2"
 
diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig
index 930b822dfb..4eca1d47de 100644
--- a/board/LaCie/netspace_v2/Kconfig
+++ b/board/LaCie/netspace_v2/Kconfig
@@ -1,5 +1,30 @@
 if TARGET_NETSPACE_V2
 
+choice
+	prompt "Board variant"
+
+config INETSPACE_V2
+	bool "INETSPACE v2"
+	select KW88F6281
+
+config NETSPACE_LITE_V2
+	bool "NETSPACE LITE v2"
+	select KW88F6192
+
+config NETSPACE_MAX_V2
+	bool "NETSPACE MAX v2"
+	select KW88F6281
+
+config NETSPACE_MINI_V2
+	bool "NETSPACE MINI v2"
+	select KW88F6192
+
+config NETSPACE_V2
+	bool "NETSPACE v2"
+	select KW88F6281
+
+endchoice
+
 config SYS_BOARD
 	default "netspace_v2"
 
diff --git a/board/Marvell/octeon_ebb7304/board.c b/board/Marvell/octeon_ebb7304/board.c
index e8e2d547c1..c6c7c13483 100644
--- a/board/Marvell/octeon_ebb7304/board.c
+++ b/board/Marvell/octeon_ebb7304/board.c
@@ -205,7 +205,7 @@ static int fdt_fix_mix(const void *fdt)
 		int env_lmac = -1;
 		int lmac_fdt_node = -1;
 		int mix_fdt_node = -1;
-		int lmac_phandle;
+		unsigned int lmac_phandle;
 		char *compat;
 
 		/* Get the lmac for this environment variable */
@@ -229,8 +229,7 @@ static int fdt_fix_mix(const void *fdt)
 			}
 		}
 
-		lmac_phandle = fdt_alloc_phandle((void *)fdt);
-		fdt_set_phandle((void *)fdt, lmac_fdt_node, lmac_phandle);
+		lmac_phandle = fdt_create_phandle((void *)fdt, lmac_fdt_node);
 
 		/* Get the fdt mix node corresponding to this lmac */
 		mix_fdt_node = get_mix_fdt_node(fdt, env_node, env_lmac);
diff --git a/board/Marvell/openrd/Kconfig b/board/Marvell/openrd/Kconfig
index 124b66da0f..dc26ed2f42 100644
--- a/board/Marvell/openrd/Kconfig
+++ b/board/Marvell/openrd/Kconfig
@@ -1,5 +1,19 @@
 if TARGET_OPENRD
 
+choice
+	prompt "Board variant"
+
+config BOARD_IS_OPENRD_BASE
+	bool "Base"
+
+config BOARD_IS_OPENRD_CLIENT
+	bool "Client"
+
+config BOARD_IS_OPENRD_ULTIMATE
+	bool "Ultimate"
+
+endchoice
+
 config SYS_BOARD
 	default "openrd"
 
diff --git a/board/amlogic/vim3/MAINTAINERS b/board/amlogic/vim3/MAINTAINERS
index 92b426f66d..d8848495c7 100644
--- a/board/amlogic/vim3/MAINTAINERS
+++ b/board/amlogic/vim3/MAINTAINERS
@@ -4,6 +4,10 @@ S:	Maintained
 L:	u-boot-amlogic@groups.io
 F:	board/amlogic/vim3/
 F:	configs/khadas-vim3_defconfig
+F:	configs/khadas-vim3_android_defconfig
+F:	configs/khadas-vim3_android_ab_defconfig
 F:	configs/khadas-vim3l_defconfig
+F:	configs/khadas-vim3l_android_defconfig
+F:	configs/khadas-vim3l_android_ab_defconfig
 F:	doc/board/amlogic/khadas-vim3.rst
 F:	doc/board/amlogic/khadas-vim3l.rst
diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
index 1d13f542e6..4aab3f092e 100644
--- a/board/armltd/vexpress64/Kconfig
+++ b/board/armltd/vexpress64/Kconfig
@@ -7,7 +7,7 @@ config SYS_VENDOR
 	default "armltd"
 
 config SYS_CONFIG_NAME
-	default "vexpress_aemv8a"
+	default "vexpress_aemv8"
 
 config JUNO_DTB_PART
 	string "NOR flash partition holding DTB"
diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile
index 868dc4f629..1878fbed4e 100644
--- a/board/armltd/vexpress64/Makefile
+++ b/board/armltd/vexpress64/Makefile
@@ -3,5 +3,5 @@
 # (C) Copyright 2000-2004
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 
-obj-y	:= vexpress64.o
+obj-y	:= vexpress64.o lowlevel_init.o
 obj-$(CONFIG_TARGET_VEXPRESS64_JUNO)	+= pcie.o
diff --git a/board/armltd/vexpress64/lowlevel_init.S b/board/armltd/vexpress64/lowlevel_init.S
new file mode 100644
index 0000000000..3dcfb85d0e
--- /dev/null
+++ b/board/armltd/vexpress64/lowlevel_init.S
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2021 Arm Limited
+ */
+
+.global save_boot_params
+save_boot_params:
+
+	adr	x8, prior_stage_fdt_address
+	str	x0, [x8]
+
+	b	save_boot_params_ret
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
index d2f307cca5..5e22e89824 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -18,6 +18,10 @@
 #include <dm/platform_data/serial_pl01x.h>
 #include "pcie.h"
 #include <asm/armv8/mmu.h>
+#ifdef CONFIG_VIRTIO_NET
+#include <virtio_types.h>
+#include <virtio.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -64,6 +68,9 @@ __weak void vexpress64_pcie_init(void)
 int board_init(void)
 {
 	vexpress64_pcie_init();
+#ifdef CONFIG_VIRTIO_NET
+	virtio_init();
+#endif
 	return 0;
 }
 
@@ -85,7 +92,15 @@ int dram_init_banksize(void)
 	return 0;
 }
 
+/* Assigned in lowlevel_init.S
+ * Push the variable into the .data section so that it
+ * does not get cleared later.
+ */
+unsigned long __section(".data") prior_stage_fdt_address;
+
 #ifdef CONFIG_OF_BOARD
+
+#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 #define JUNO_FLASH_SEC_SIZE	(256 * 1024)
 static phys_addr_t find_dtb_in_nor_flash(const char *partname)
 {
@@ -130,9 +145,11 @@ static phys_addr_t find_dtb_in_nor_flash(const char *partname)
 
 	return ~0;
 }
+#endif
 
 void *board_fdt_blob_setup(int *err)
 {
+#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 	phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART);
 
 	*err = 0;
@@ -142,6 +159,22 @@ void *board_fdt_blob_setup(int *err)
 	}
 
 	return (void *)fdt_rom_addr;
+#endif
+
+#ifdef VEXPRESS_FDT_ADDR
+	if (fdt_magic(VEXPRESS_FDT_ADDR) == FDT_MAGIC) {
+		*err = 0;
+		return (void *)VEXPRESS_FDT_ADDR;
+	}
+#endif
+
+	if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC) {
+		*err = 0;
+		return (void *)prior_stage_fdt_address;
+	}
+
+	*err = -ENXIO;
+	return NULL;
 }
 #endif
 
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 32acf36784..88036c16c9 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
 
 	if (bl33_info->version != BL33_INFO_VERSION)
 		printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+	if (chimp_fastboot_optee() != 0)
+		printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
 	return 0;
 }
 
diff --git a/board/cadence/xtfpga/xtfpga.c b/board/cadence/xtfpga/xtfpga.c
index c26793d76c..ade7f9d120 100644
--- a/board/cadence/xtfpga/xtfpga.c
+++ b/board/cadence/xtfpga/xtfpga.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <command.h>
 #include <dm.h>
 #include <init.h>
@@ -49,7 +50,7 @@ int checkboard(void)
 	return 0;
 }
 
-int board_postclk_init(void)
+unsigned long get_board_sys_clk(void)
 {
 	/*
 	 * Obtain CPU clock frequency from board and cache in global
@@ -58,11 +59,17 @@ int board_postclk_init(void)
 	 */
 
 #ifdef CONFIG_SYS_FPGAREG_FREQ
-	gd->cpu_clk = (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ);
+	return (*(volatile unsigned long *)CONFIG_SYS_FPGAREG_FREQ);
 #else
 	/* early Tensilica bitstreams lack this reg, but most run at 50 MHz */
-	gd->cpu_clk = 50000000UL;
+	return 50000000;
 #endif
+}
+
+int board_postclk_init(void)
+{
+	gd->cpu_clk = get_board_sys_clk();
+
 	return 0;
 }
 
diff --git a/board/compulab/cl-som-imx7/Kconfig b/board/compulab/cl-som-imx7/Kconfig
index 6d69cf31f4..ffd857ced1 100644
--- a/board/compulab/cl-som-imx7/Kconfig
+++ b/board/compulab/cl-som-imx7/Kconfig
@@ -17,10 +17,6 @@ config SYS_USB_DEV
 	int
 	default 0
 
-config SYS_MMC_IMG_LOAD_PART
-	int
-	default 1
-
 config SYS_USB_IMG_LOAD_PART
 	int
 	default 1
diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c
index 11294d6e87..3b90ae7538 100644
--- a/board/coreboot/coreboot/coreboot.c
+++ b/board/coreboot/coreboot/coreboot.c
@@ -4,10 +4,11 @@
  */
 
 #include <common.h>
-#include <asm/cb_sysinfo.h>
-#include <asm/global_data.h>
+#include <splash.h>
 #include <init.h>
 #include <smbios.h>
+#include <asm/cb_sysinfo.h>
+#include <asm/global_data.h>
 
 int board_early_init_r(void)
 {
@@ -65,3 +66,18 @@ fallback:
 	return checkboard();
 }
 #endif
+
+static struct splash_location coreboot_splash_locations[] = {
+	{
+		.name = "virtio_fs",
+		.storage = SPLASH_STORAGE_VIRTIO,
+		.flags = SPLASH_STORAGE_RAW,
+		.devpart = "0",
+	},
+};
+
+int splash_screen_prepare(void)
+{
+	return splash_source_load(coreboot_splash_locations,
+				  ARRAY_SIZE(coreboot_splash_locations));
+}
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index 1bbf1bc84a..a380db61a0 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -65,5 +65,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	imply VIRTIO_BLK
 	imply MTD_NOR_FLASH
 	imply CFI_FLASH
+	imply OF_HAS_PRIOR_STAGE
 
 endif
diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig
index 69620dbb74..300b01e040 100644
--- a/board/freescale/common/Kconfig
+++ b/board/freescale/common/Kconfig
@@ -28,36 +28,67 @@ config FSL_USE_PCA9547_MUX
 	 This option enables the PCA9547 I2C mux on Freescale boards.
 
 config VID
-	depends on DM_I2C
 	bool "Enable Freescale VID"
+	depends on I2C || DM_I2C
 	help
 	 This option enables setting core voltage based on individual
 	 values saved in SoC fuses.
 
+config SPL_VID
+	bool "Enable Freescale VID in SPL"
+	depends on I2C || DM_I2C
+	help
+	 This option enables setting core voltage based on individual
+	 values saved in SoC fuses, in SPL.
+
+if VID || SPL_VID
+
+config VID_FLS_ENV
+	string "Environment variable for overriding VDD"
+	help
+	  This option allows for specifying the environment variable
+	  to check to override VDD information.
+
+config VOL_MONITOR_INA220
+	bool "Enable the INA220 voltage monitor read"
+	help
+	  This option enables INA220 voltage monitor read
+	  functionality. It is used by the common VID driver.
+
+config VOL_MONITOR_IR36021_READ
+	bool "Enable the IR36021 voltage monitor read"
+	help
+	 This option enables IR36021 voltage monitor read
+	 functionality. It is used by the common VID driver.
+
+config VOL_MONITOR_IR36021_SET
+	bool "Enable the IR36021 voltage monitor set"
+	help
+	 This option enables IR36021 voltage monitor set
+	 functionality. It is used by the common VID driver.
+
 config VOL_MONITOR_LTC3882_READ
-	depends on VID
 	bool "Enable the LTC3882 voltage monitor read"
 	help
 	 This option enables LTC3882 voltage monitor read
 	 functionality. It is used by the common VID driver.
 
 config VOL_MONITOR_LTC3882_SET
-	depends on VID
 	bool "Enable the LTC3882 voltage monitor set"
 	help
 	 This option enables LTC3882 voltage monitor set
 	 functionality. It is used by the common VID driver.
 
 config VOL_MONITOR_ISL68233_READ
-	depends on VID
 	bool "Enable the ISL68233 voltage monitor read"
 	help
 	 This option enables ISL68233 voltage monitor read
 	 functionality. It is used by the common VID driver.
 
 config VOL_MONITOR_ISL68233_SET
-	depends on VID
 	bool "Enable the ISL68233 voltage monitor set"
 	help
 	 This option enables ISL68233 voltage monitor set
 	 functionality. It is used by the common VID driver.
+
+endif
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 3a171688c3..0ddfb59d7d 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -33,7 +33,7 @@ obj-$(CONFIG_FSL_NGPIXIS)	+= ngpixis.o
 endif
 obj-$(I2C_COMMON)		+= i2c_common.o
 obj-$(CONFIG_FSL_USE_PCA9547_MUX)		+= i2c_mux.o
-obj-$(CONFIG_VID)		+= vid.o
+obj-$(CONFIG_$(SPL_)VID)	+= vid.o
 obj-$(CONFIG_FSL_QIXIS)	+= qixis.o
 obj-$(CONFIG_PQ_MDS_PIB)	+= pq-mds-pib.o
 ifndef CONFIG_SPL_BUILD
diff --git a/board/freescale/common/cadmus.c b/board/freescale/common/cadmus.c
index 7e7394f333..8f3fb5fa81 100644
--- a/board/freescale/common/cadmus.c
+++ b/board/freescale/common/cadmus.c
@@ -5,7 +5,7 @@
 
 
 #include <common.h>
-
+#include <clock_legacy.h>
 
 /*
  * CADMUS Board System Registers
@@ -37,7 +37,7 @@ get_board_version(void)
 
 
 unsigned long
-get_clock_freq(void)
+get_board_sys_clk(void)
 {
 	volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG;
 
diff --git a/board/freescale/common/cadmus.h b/board/freescale/common/cadmus.h
index ddc2bb6c1f..fb74e8f6db 100644
--- a/board/freescale/common/cadmus.h
+++ b/board/freescale/common/cadmus.h
@@ -19,7 +19,7 @@ extern unsigned int get_board_version(void);
 /*
  * Returns either 33000000 or 66000000 as the SYS_CLK_FREQ.
  */
-extern unsigned long get_clock_freq(void);
+extern unsigned long get_board_sys_clk(void);
 
 
 /*
diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c
index 2143395781..01662d36e9 100644
--- a/board/freescale/common/ics307_clk.c
+++ b/board/freescale/common/ics307_clk.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <log.h>
 #include <asm/io.h>
 
@@ -137,6 +138,7 @@ unsigned long get_board_sys_clk(void)
 			in_8(&fpga_reg->sclk[2]));
 }
 
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
 unsigned long get_board_ddr_clk(void)
 {
 	return ics307_clk_freq(
@@ -144,3 +146,4 @@ unsigned long get_board_ddr_clk(void)
 			in_8(&fpga_reg->dclk[1]),
 			in_8(&fpga_reg->dclk[2]));
 }
+#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index fbbd27d9d7..0647622cde 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -102,6 +102,7 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ
 unsigned long get_board_sys_clk(void)
 {
 	u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
@@ -126,6 +127,7 @@ unsigned long get_board_sys_clk(void)
 	}
 	return 66666666;
 }
+#endif
 
 #ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
 unsigned long get_board_ddr_clk(void)
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 2d5322406a..13359f947b 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <i2c.h>
 #include <fdt_support.h>
 #include <fsl_ddr_sdram.h>
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index cc95d441b6..8481c45a58 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <i2c.h>
 #include <fdt_support.h>
 #include <fsl_ddr_sdram.h>
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 7046fbaeb5..aa548b20d7 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -3,6 +3,7 @@
  * Copyright 2017-2018 NXP
  */
 #include <common.h>
+#include <clock_legacy.h>
 #include <env.h>
 #include <i2c.h>
 #include <init.h>
@@ -374,6 +375,7 @@ bool if_board_diff_clk(void)
 #endif
 }
 
+#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ
 unsigned long get_board_sys_clk(void)
 {
 	u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
@@ -397,7 +399,9 @@ unsigned long get_board_sys_clk(void)
 
 	return 66666666;
 }
+#endif
 
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
 unsigned long get_board_ddr_clk(void)
 {
 	u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
@@ -415,6 +419,7 @@ unsigned long get_board_ddr_clk(void)
 
 	return 66666666;
 }
+#endif
 
 #if !defined(CONFIG_SPL_BUILD)
 void board_retimer_init(void)
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 2f0139edef..297629d5ef 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -3,6 +3,7 @@
  * Copyright 2015 Freescale Semiconductor
  */
 #include <common.h>
+#include <clock_legacy.h>
 #include <env.h>
 #include <init.h>
 #include <malloc.h>
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index bf660a8e65..1975b0f47d 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -4,6 +4,7 @@
  * Copyright 2017 NXP
  */
 #include <common.h>
+#include <clock_legacy.h>
 #include <env.h>
 #include <init.h>
 #include <malloc.h>
diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c
index a2b6442b54..1819b27561 100644
--- a/board/freescale/lx2160a/eth_lx2160aqds.c
+++ b/board/freescale/lx2160a/eth_lx2160aqds.c
@@ -775,10 +775,11 @@ int fdt_fixup_board_phy(void *fdt)
 	int fpga_offset, offset, subnodeoffset;
 	struct mii_dev *mii_dev;
 	struct list_head *mii_devs, *entry;
-	int ret, dpmac_id, phandle, i;
+	int ret, dpmac_id, i;
 	struct phy_device *phy_dev;
 	char ethname[ETH_NAME_LEN];
 	phy_interface_t	phy_iface;
+	uint32_t phandle;
 
 	ret = 0;
 	/* we know FPGA is connected to i2c0, therefore search path directly,
@@ -794,7 +795,10 @@ int fdt_fixup_board_phy(void *fdt)
 		return fpga_offset;
 	}
 
-	phandle = fdt_alloc_phandle(fdt);
+	ret = fdt_generate_phandle(fdt, &phandle);
+	if (ret < 0)
+		return ret;
+
 	mii_devs = mdio_get_list_head();
 
 	list_for_each(entry, mii_devs) {
diff --git a/board/freescale/lx2160a/eth_lx2162aqds.c b/board/freescale/lx2160a/eth_lx2162aqds.c
index 3b04dea39c..ac6218ebe4 100644
--- a/board/freescale/lx2160a/eth_lx2162aqds.c
+++ b/board/freescale/lx2160a/eth_lx2162aqds.c
@@ -787,10 +787,11 @@ int fdt_fixup_board_phy(void *fdt)
 	int fpga_offset, offset, subnodeoffset;
 	struct mii_dev *mii_dev;
 	struct list_head *mii_devs, *entry;
-	int ret, dpmac_id, phandle, i;
+	int ret, dpmac_id, i;
 	struct phy_device *phy_dev;
 	char ethname[ETH_NAME_LEN];
 	phy_interface_t	phy_iface;
+	uint32_t phandle;
 
 	ret = 0;
 	/* we know FPGA is connected to i2c0, therefore search path directly,
@@ -806,7 +807,10 @@ int fdt_fixup_board_phy(void *fdt)
 		return fpga_offset;
 	}
 
-	phandle = fdt_alloc_phandle(fdt);
+	ret = fdt_generate_phandle(fdt, &phandle);
+	if (ret < 0)
+		return ret;
+
 	mii_devs = mdio_get_list_head();
 
 	list_for_each(entry, mii_devs) {
diff --git a/board/freescale/p1010rdb/spl.c b/board/freescale/p1010rdb/spl.c
index 6c84eef398..7eaa2047fa 100644
--- a/board/freescale/p1010rdb/spl.c
+++ b/board/freescale/p1010rdb/spl.c
@@ -43,7 +43,7 @@ void board_init_f(ulong bootflag)
 	/* initialize selected port with appropriate baud rate */
 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
 	plat_ratio >>= 1;
-	gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+	gd->bus_clk = get_board_sys_clk() * plat_ratio;
 
 	ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
 		     gd->bus_clk / 16 / CONFIG_BAUDRATE);
diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c
index 989c5b139a..a956c5af5b 100644
--- a/board/freescale/p1010rdb/spl_minimal.c
+++ b/board/freescale/p1010rdb/spl_minimal.c
@@ -3,6 +3,7 @@
  * Copyright 2011 Freescale Semiconductor, Inc.
  */
 #include <common.h>
+#include <clock_legacy.h>
 #include <init.h>
 #include <mpc85xx.h>
 #include <asm/io.h>
@@ -29,7 +30,7 @@ void board_init_f(ulong bootflag)
 	/* initialize selected port with appropriate baud rate */
 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
 	plat_ratio >>= 1;
-	gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+	gd->bus_clk = get_board_sys_clk() * plat_ratio;
 
 	ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
 		     gd->bus_clk / 16 / CONFIG_BAUDRATE);
diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c
index 118468408e..f855f3a81c 100644
--- a/board/freescale/p1_p2_rdb_pc/spl.c
+++ b/board/freescale/p1_p2_rdb_pc/spl.c
@@ -48,7 +48,7 @@ void board_init_f(ulong bootflag)
 	/* initialize selected port with appropriate baud rate */
 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
 	plat_ratio >>= 1;
-	bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+	bus_clk = get_board_sys_clk() * plat_ratio;
 	gd->bus_clk = bus_clk;
 
 	ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
diff --git a/board/freescale/p1_p2_rdb_pc/spl_minimal.c b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
index eb3f2c83fa..72beeadf55 100644
--- a/board/freescale/p1_p2_rdb_pc/spl_minimal.c
+++ b/board/freescale/p1_p2_rdb_pc/spl_minimal.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <init.h>
 #include <ns16550.h>
 #include <asm/io.h>
@@ -28,7 +29,7 @@ void board_init_f(ulong bootflag)
 	/* initialize selected port with appropriate baud rate */
 	plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
 	plat_ratio >>= 1;
-	gd->bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+	gd->bus_clk = get_board_sys_clk() * plat_ratio;
 
 	ns16550_init((struct ns16550 *)CONFIG_SYS_NS16550_COM1,
 		     gd->bus_clk / 16 / CONFIG_BAUDRATE);
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 4ece1e6ea0..5bd2b99506 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <command.h>
 #include <env.h>
 #include <fdt_support.h>
@@ -148,7 +149,7 @@ int board_early_init_r(void)
 	return 0;
 }
 
-unsigned long get_board_sys_clk(unsigned long dummy)
+unsigned long get_board_sys_clk(void)
 {
 	u8 sysclk_conf = CPLD_READ(sysclk_sw1);
 
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index ac373d7724..af15da5427 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -25,11 +25,6 @@ phys_size_t get_effective_memsize(void)
 	return CONFIG_SYS_L3_SIZE;
 }
 
-unsigned long get_board_sys_clk(void)
-{
-	return CONFIG_SYS_CLK_FREQ;
-}
-
 #if defined(CONFIG_SPL_MMC_BOOT)
 #define GPIO1_SD_SEL 0x00020000
 int board_mmc_getcd(struct mmc *mmc)
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index ab7675e209..539a5c7344 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -162,11 +162,6 @@ int board_early_init_r(void)
 	return 0;
 }
 
-unsigned long get_board_sys_clk(void)
-{
-	return CONFIG_SYS_CLK_FREQ;
-}
-
 #ifdef CONFIG_TARGET_T1024RDB
 void board_reset(void)
 {
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index c7df11100e..dfaff1a916 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -25,11 +25,6 @@ phys_size_t get_effective_memsize(void)
 	return CONFIG_SYS_L3_SIZE;
 }
 
-unsigned long get_board_sys_clk(void)
-{
-	return CONFIG_SYS_CLK_FREQ;
-}
-
 #define FSL_CORENET_CCSR_PORSR1_RCW_MASK	0xFF800000
 void board_init_f(ulong bootflag)
 {
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index e54672a80b..1da3a714f2 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <command.h>
 #include <env.h>
 #include <fdt_support.h>
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index 2204a98ac8..60fe084bbb 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -24,11 +24,6 @@ phys_size_t get_effective_memsize(void)
 	return CONFIG_SYS_L3_SIZE;
 }
 
-unsigned long get_board_sys_clk(void)
-{
-	return CONFIG_SYS_CLK_FREQ;
-}
-
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, sys_clk, ccb_clk;
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index 3611dbbf32..1c8017b593 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -109,11 +109,6 @@ int board_early_init_r(void)
 	return 0;
 }
 
-unsigned long get_board_sys_clk(void)
-{
-	return CONFIG_SYS_CLK_FREQ;
-}
-
 int misc_init_r(void)
 {
 	u8 reg;
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index 69d1449b07..c7d5de35d5 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -30,11 +30,6 @@ phys_size_t get_effective_memsize(void)
 	return CONFIG_SYS_L3_SIZE;
 }
 
-unsigned long get_board_sys_clk(void)
-{
-	return CONFIG_SYS_CLK_FREQ;
-}
-
 void board_init_f(ulong bootflag)
 {
 	u32 plat_ratio, sys_clk, ccb_clk;
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 2be921f47a..7ec931c8a8 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -1681,8 +1681,7 @@ void ft_early_fixup(void *blob, int board_type)
 		 * disable serial2 node for GW54xx for compatibility with older
 		 * 3.10.x kernel that improperly had this node enabled in the DT
 		 */
-		fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED,
-					0);
+		fdt_set_status_by_alias(blob, "serial2", FDT_STATUS_DISABLED);
 
 		/* GW54xx-E adds WDOG2_B external reset */
 		if (rev < 'E')
diff --git a/board/keymile/kmcent2/kmcent2.c b/board/keymile/kmcent2/kmcent2.c
index 4f5164e63c..ca24b960c7 100644
--- a/board/keymile/kmcent2/kmcent2.c
+++ b/board/keymile/kmcent2/kmcent2.c
@@ -181,11 +181,6 @@ unsigned long get_serial_clock(unsigned long dummy)
 	return (gd->bus_clk / 2);
 }
 
-unsigned long get_board_sys_clk(unsigned long dummy)
-{
-	return 66666666;
-}
-
 int misc_init_f(void)
 {
 	/* configure QRIO pis for i2c deblocking */
diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c
index c8ed7ac81a..e84b356918 100644
--- a/board/kontron/sl28/sl28.c
+++ b/board/kontron/sl28/sl28.c
@@ -75,7 +75,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	if (CONFIG_IS_ENABLED(SL28_SPL_LOADS_OPTEE_BL32)) {
 		node = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz");
 		if (node)
-			fdt_set_node_status(blob, node, FDT_STATUS_OKAY, 0);
+			fdt_set_node_status(blob, node, FDT_STATUS_OKAY);
 	}
 
 	return 0;
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
index d5fe336d22..5c1af1a772 100644
--- a/board/liebherr/display5/spl.c
+++ b/board/liebherr/display5/spl.c
@@ -327,8 +327,10 @@ void board_init_f(ulong dummy)
 	displ5_set_iomux_misc_spl();
 
 	/* Initialize and reset WDT in SPL */
+#ifdef CONFIG_SPL_WATCHDOG
 	hw_watchdog_init();
 	WATCHDOG_RESET();
+#endif
 
 	/* load/boot image from boot device */
 	board_init_r(NULL, 0);
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index ff69607d3c..17b8108cc8 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -510,7 +510,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 
 	node = fdt_node_offset_by_compatible(blob, -1, "simple-framebuffer");
 	if (node < 0)
-		lcd_dt_simplefb_add_node(blob);
+		fdt_simplefb_add_node(blob);
 
 #ifdef CONFIG_EFI_LOADER
 	/* Reserve the spin table */
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index 3417b50f3b..9af935c33f 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <cpu_func.h>
 #include <hang.h>
 #include <init.h>
@@ -50,7 +51,7 @@ void s_init(void)
 	writel(0xA5A5A500, &swdt->swtcsra);
 
 	/* CPU frequency setting. Set to 0.8GHz */
-	stc = ((800 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_OFFSET;
+	stc = ((800 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_OFFSET;
 	clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 }
 
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 51768c315e..6197e549c2 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
@@ -45,7 +46,7 @@ void s_init(void)
 	writel(0xA5A5A500, &swdt->swtcsra);
 
 	/* CPU frequency setting. Set to 1.5GHz */
-	stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+	stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
 	clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 
 	/* QoS */
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index 7e94bd8205..87607df20d 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
@@ -47,7 +48,7 @@ void s_init(void)
 	writel(0xA5A5A500, &swdt->swtcsra);
 
 	/* CPU frequency setting. Set to 1.5GHz */
-	stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+	stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
 	clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 
 	/* QoS */
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 87c5e01371..8e24ac013c 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <env_internal.h>
@@ -50,7 +51,7 @@ void s_init(void)
 	/* CPU frequency setting. Set to 1.4GHz */
 	if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
 		u32 stat = 0;
-		u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+		u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
 			<< PLL0_STC_BIT;
 		clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index b0f8505252..1a3a4c11a1 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
@@ -47,7 +48,7 @@ void s_init(void)
 	writel(0xA5A5A500, &swdt->swtcsra);
 
 	/* CPU frequency setting. Set to 1.5GHz */
-	stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+	stc = ((1500 / CLK2MHZ(get_board_sys_clk())) - 1) << PLL0_STC_BIT;
 	clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 
 	/* QoS */
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 3fdf936ddc..56bdb34329 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <env.h>
 #include <init.h>
 #include <malloc.h>
@@ -50,7 +51,7 @@ void s_init(void)
 	/* CPU frequency setting. Set to 1.4GHz */
 	if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X) {
 		u32 stat = 0;
-		u32 stc = ((1400 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1)
+		u32 stc = ((1400 / CLK2MHZ(get_board_sys_clk())) - 1)
 			<< PLL0_STC_BIT;
 		clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
 
diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env
new file mode 100644
index 0000000000..b4c04635a4
--- /dev/null
+++ b/board/sandbox/sandbox.env
@@ -0,0 +1,25 @@
+stdin=serial
+#ifdef CONFIG_SANDBOX_SDL
+stdin+=,cros-ec-keyb,usbkbd
+#endif
+stdout=serial,vidconsole
+stderr=serial,vidconsole
+
+ethaddr=02:00:11:22:33:44
+eth2addr=02:00:11:22:33:48
+eth3addr=02:00:11:22:33:45
+eth4addr=02:00:11:22:33:48
+eth5addr=02:00:11:22:33:46
+eth6addr=02:00:11:22:33:47
+ipaddr=192.0.2.1
+
+/*
+ * These are used for distro boot which is not supported. But once bootmethod
+ * is provided these will be used again.
+ */
+bootm_size=0x10000000
+kernel_addr_r=0x1000000
+fdt_addr_r=0xc00000
+ramdisk_addr_r=0x2000000
+scriptaddr=0x1000
+pxefile_addr_r=0x2000
diff --git a/board/siemens/capricorn/MAINTAINERS b/board/siemens/capricorn/MAINTAINERS
index bc7d163e17..b4c52032cc 100644
--- a/board/siemens/capricorn/MAINTAINERS
+++ b/board/siemens/capricorn/MAINTAINERS
@@ -5,7 +5,6 @@ F:	board/siemens/capricorn/
 F:	include/configs/capricorn-common.h
 F:	include/configs/deneb.h
 F:	include/configs/giedi.h
-F:	include/configs/siemens-ccp-common.h
 F:	include/configs/siemens-env-common.h
 F:	configs/deneb_defconfig
 F:	configs/giedi_defconfig
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index a81cb7b2ba..f6a3cc1793 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -57,7 +57,7 @@ int checkboard (void)
 	/* Check the PCI_clk sel bit */
 	if (in_be32(&gur->porpllsr) & (1<<15)) {
 		src = "SYSCLK";
-		f = CONFIG_SYS_CLK_FREQ;
+		f = get_board_sys_clk();
 	} else {
 		src = "PCI_CLK";
 		f = CONFIG_PCI_CLK_FREQ;
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 00d1fb8f59..a3f0da5b5b 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -132,6 +132,10 @@ void set_dfu_alt_info(char *interface, char *devstr)
 			mtd = get_mtd_device_nm("nor0");
 			if (!IS_ERR_OR_NULL(mtd))
 				board_get_alt_info_mtd(mtd, buf);
+
+			mtd = get_mtd_device_nm("nor1");
+			if (!IS_ERR_OR_NULL(mtd))
+				board_get_alt_info_mtd(mtd, buf);
 		}
 
 		mtd = get_mtd_device_nm("nand0");
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 84592677e4..45f2ca81a6 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -13,6 +13,7 @@
 #include <dm.h>
 #include <env.h>
 #include <env_internal.h>
+#include <fdt_simplefb.h>
 #include <fdt_support.h>
 #include <g_dnl.h>
 #include <generic-phy.h>
@@ -914,6 +915,9 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 		if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS))
 			fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
 
+	if (CONFIG_IS_ENABLED(FDT_SIMPLEFB))
+		fdt_simplefb_enable_and_mem_rsv(blob);
+
 	return 0;
 }
 #endif
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index fdbcd40269..2790a0f9e8 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <dm.h>
 #include <env.h>
 #include <hang.h>
@@ -667,7 +668,7 @@ void sunxi_board_init(void)
 	 * assured it's being powered with suitable core voltage
 	 */
 	if (!power_failed)
-		clock_set_pll1(CONFIG_SYS_CLK_FREQ);
+		clock_set_pll1(get_board_sys_clk());
 	else
 		printf("Failed to set core voltage! Can't set CPU frequency\n");
 }
diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c
index bb2d514956..6e41ca2399 100644
--- a/board/theadorable/theadorable.c
+++ b/board/theadorable/theadorable.c
@@ -298,10 +298,19 @@ int board_late_init(void)
 		bootcount_inc();
 
 		if (bootcount > PEX_SWITCH_NOT_FOUNT_LIMIT) {
-			printf("Issuing power-switch via uC!\n");
+			struct udevice *dev;
 
 			printf("Issuing power-switch via uC!\n");
-			i2c_set_bus_num(STM_I2C_BUS);
+			ret = i2c_get_chip_for_busnum(STM_I2C_BUS, STM_I2C_ADDR,
+						      1, &dev);
+			if (ret) {
+				printf("Error selecting STM on I2C bus (ret=%d)\n",
+				       ret);
+				printf("Issuing soft-reset...\n");
+				/* default handling: SOFT reset */
+				do_reset(NULL, 0, 0, NULL);
+			}
+
 			i2c_buf[0] = STM_I2C_ADDR << 1;
 			i2c_buf[1] = 0xc5;	/* cmd */
 			i2c_buf[2] = 0x01;	/* enable */
@@ -313,7 +322,7 @@ int board_late_init(void)
 			i2c_buf[6] = 0x00;
 			i2c_buf[7] = crc8(0x72, &i2c_buf[0], 7);
 
-			ret = i2c_write(STM_I2C_ADDR, 0, 0, &i2c_buf[1], 7);
+			ret = dm_i2c_write(dev, 0, &i2c_buf[1], 7);
 			if (ret) {
 				printf("I2C write error (ret=%d)\n", ret);
 				printf("Issuing soft-reset...\n");
diff --git a/board/warp7/Kconfig b/board/warp7/Kconfig
index e5051cdda6..05b4420afc 100644
--- a/board/warp7/Kconfig
+++ b/board/warp7/Kconfig
@@ -14,12 +14,6 @@ config WARP7_ROOT_PART
 	  partition that is typically specified with root=/dev/sdaX or
 	  which gets converted into a root=PARTUUID=some_uuid.
 
-config SYS_FDT_ADDR
-	hex "FDT load address"
-	default 0x83000000
-	help
-	  The address the FDT file should be loaded to.
-
 config IMX_CONFIG
 	default "board/warp7/imximage.cfg"
 
diff --git a/board/xen/xenguest_arm64/Kconfig b/board/xen/xenguest_arm64/Kconfig
index cc131ed5b9..4d8aa35007 100644
--- a/board/xen/xenguest_arm64/Kconfig
+++ b/board/xen/xenguest_arm64/Kconfig
@@ -9,4 +9,7 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
 	default "xenguest_arm64"
 
+config LNX_KRNL_IMG_TEXT_OFFSET_BASE
+	default SYS_LOAD_ADDR
+
 endif
diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile
index 4932030547..002821916c 100644
--- a/board/xes/common/Makefile
+++ b/board/xes/common/Makefile
@@ -3,7 +3,6 @@
 # (C) Copyright 2006
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 
-obj-$(CONFIG_FSL_PCI_INIT)	+= fsl_8xxx_pci.o
 obj-$(CONFIG_MPC86xx)		+= fsl_8xxx_clk.o
 obj-$(CONFIG_ARCH_P2020)		+= fsl_8xxx_clk.o
 obj-$(CONFIG_MPC85xx)		+= fsl_8xxx_misc.o board.o
diff --git a/board/xes/common/fsl_8xxx_clk.c b/board/xes/common/fsl_8xxx_clk.c
index 8ca65ca859..20e88d4360 100644
--- a/board/xes/common/fsl_8xxx_clk.c
+++ b/board/xes/common/fsl_8xxx_clk.c
@@ -4,12 +4,13 @@
  */
 
 #include <common.h>
+#include <clock_legacy.h>
 #include <asm/io.h>
 
 /*
  * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config
  */
-unsigned long get_board_sys_clk(ulong dummy)
+unsigned long get_board_sys_clk(void)
 {
 #if defined(CONFIG_MPC85xx)
 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -33,13 +34,13 @@ unsigned long get_board_sys_clk(ulong dummy)
  * Return DDR input clock - synchronous with SYSCLK or 66 MHz
  * Note: 86xx doesn't support asynchronous DDR clk
  */
-unsigned long get_board_ddr_clk(ulong dummy)
+unsigned long get_board_ddr_clk(void)
 {
 	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9;
 
 	if (ddr_ratio == 0x7)
-		return get_board_sys_clk(dummy);
+		return get_board_sys_clk();
 
 #ifdef CONFIG_ARCH_P2020
 	if (in_be32(&gur->gpporcr) & 0x20000)
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
deleted file mode 100644
index c1fce7d331..0000000000
--- a/board/xes/common/fsl_8xxx_pci.c
+++ /dev/null
@@ -1,22 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2008 Extreme Engineering Solutions, Inc.
- * Copyright 2007-2008 Freescale Semiconductor, Inc.
- */
-
-#include <common.h>
-#include <init.h>
-#include <pci.h>
-#include <asm/fsl_pci.h>
-#include <asm/fsl_serdes.h>
-#include <asm/io.h>
-#include <linux/compiler.h>
-#include <linux/libfdt.h>
-#include <fdt_support.h>
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_pci_setup(void *blob, struct bd_info *bd)
-{
-	FT_FSL_PCI_SETUP;
-}
-#endif /* CONFIG_OF_BOARD_SETUP */