diff options
| author | yanhong.wang <yanhong.wang@starfivetech.com> | 2022-05-25 08:55:58 +0300 |
|---|---|---|
| committer | Yanhong Wang <yanhong.wang@linux.starfivetech.com> | 2022-10-18 11:24:36 +0300 |
| commit | 5531f12c6efc79817914bf96f5b755840402e8c7 (patch) | |
| tree | 33e78ded34d43d9209dfd94df149d4e7f6c31389 /board | |
| parent | 0b2572d9978f265b51a218f334434ab9fde41552 (diff) | |
| download | u-boot-5531f12c6efc79817914bf96f5b755840402e8c7.tar.xz | |
board:starfive:evb: add usb init config
Add usb init config for starfive EVB board. Default set to USB2.0
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/starfive/evb/starfive_evb.c | 89 |
1 files changed, 65 insertions, 24 deletions
diff --git a/board/starfive/evb/starfive_evb.c b/board/starfive/evb/starfive_evb.c index d59bad49ee..effc987de1 100644 --- a/board/starfive/evb/starfive_evb.c +++ b/board/starfive/evb/starfive_evb.c @@ -70,32 +70,73 @@ static void jh7110_gmac_init(int id) } } -static void jh7110_usb_init(void) +static void jh7110_usb_init(bool usb2_enable) { - clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, - USB_MODE_STRAP_MASK, - (2<<USB_MODE_STRAP_SHIFT) & USB_MODE_STRAP_MASK); - clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, - USB_OTG_SUSPENDM_BYPS_MASK, - BIT(USB_OTG_SUSPENDM_BYPS_SHIFT) - & USB_OTG_SUSPENDM_BYPS_MASK); - - clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, - USB_OTG_SUSPENDM_MASK, - BIT(USB_OTG_SUSPENDM_SHIFT) & USB_OTG_SUSPENDM_MASK); - clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, - USB_PLL_EN_MASK, - BIT(USB_PLL_EN_SHIFT) & USB_PLL_EN_MASK); - clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, - USB_REFCLK_MODE_MASK, - BIT(USB_REFCLK_MODE_SHIFT) & USB_REFCLK_MODE_MASK); - - clrsetbits_le32(SYS_SYSCON_BASE + SYS_SYSCON_24, - PDRSTN_SPLIT_MASK, - BIT(PDRSTN_SPLIT_SHIFT) & PDRSTN_SPLIT_MASK); + if (usb2_enable) { + /*usb 2.0 utmi phy init*/ + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, + USB_MODE_STRAP_MASK, + (2<<USB_MODE_STRAP_SHIFT) & + USB_MODE_STRAP_MASK);/*2:host mode, 4:device mode*/ + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, + USB_OTG_SUSPENDM_BYPS_MASK, + BIT(USB_OTG_SUSPENDM_BYPS_SHIFT) + & USB_OTG_SUSPENDM_BYPS_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, + USB_OTG_SUSPENDM_MASK, + BIT(USB_OTG_SUSPENDM_SHIFT) & + USB_OTG_SUSPENDM_MASK);/*HOST = 1. DEVICE = 0;*/ + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, + USB_PLL_EN_MASK, + BIT(USB_PLL_EN_SHIFT) & USB_PLL_EN_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_4, + USB_REFCLK_MODE_MASK, + BIT(USB_REFCLK_MODE_SHIFT) & USB_REFCLK_MODE_MASK); + /* usb 2.0 phy mode,REPLACE USB3.0 PHY module = 1;else = 0*/ + clrsetbits_le32(SYS_SYSCON_BASE + SYS_SYSCON_24, + PDRSTN_SPLIT_MASK, + BIT(PDRSTN_SPLIT_SHIFT) & + PDRSTN_SPLIT_MASK); + } else { + /*usb 3.0 pipe phy config*/ + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_196, + PCIE_CKREF_SRC_MASK, + (0<<PCIE_CKREF_SRC_SHIFT) & PCIE_CKREF_SRC_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_196, + PCIE_CLK_SEL_MASK, + (0<<PCIE_CLK_SEL_SHIFT) & PCIE_CLK_SEL_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_328, + PCIE_PHY_MODE_MASK, + BIT(PCIE_PHY_MODE_SHIFT) & PCIE_PHY_MODE_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_500, + PCIE_USB3_BUS_WIDTH_MASK, + (0 << PCIE_USB3_BUS_WIDTH_SHIFT) & + PCIE_USB3_BUS_WIDTH_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_500, + PCIE_USB3_RATE_MASK, + (0 << PCIE_USB3_RATE_SHIFT) & PCIE_USB3_RATE_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_500, + PCIE_USB3_RX_STANDBY_MASK, + (0 << PCIE_USB3_RX_STANDBY_SHIFT) + & PCIE_USB3_RX_STANDBY_MASK); + clrsetbits_le32(STG_SYSCON_BASE + STG_SYSCON_500, + PCIE_USB3_PHY_ENABLE_MASK, + BIT(PCIE_USB3_PHY_ENABLE_SHIFT) + & PCIE_USB3_PHY_ENABLE_MASK); + + /* usb 3.0 phy mode,REPLACE USB3.0 PHY module = 1;else = 0*/ + clrsetbits_le32(SYS_SYSCON_BASE + SYS_SYSCON_24, + PDRSTN_SPLIT_MASK, + (0 << PDRSTN_SPLIT_SHIFT) & PDRSTN_SPLIT_MASK); + } + SYS_IOMUX_DOEN(33, LOW); + SYS_IOMUX_DOUT(33, 7); + SYS_IOMUX_DOEN(34, HIGH); + clrsetbits_le32(SYS_IOMUX_BASE + SYS_IOMUX_32, IOMUX_USB_MASK, - BIT(IOMUX_USB_SHIFT) & IOMUX_USB_MASK); + ((34+2) << IOMUX_USB_SHIFT) & IOMUX_USB_MASK); + } static void jh7110_mmc_init(int id) @@ -139,7 +180,7 @@ int board_init(void) jh7110_gmac_init(1); jh7110_timer_init(); - jh7110_usb_init(); + jh7110_usb_init(true); jh7110_mmc_init(0); jh7110_mmc_init(1); |