diff options
| author | mason.huo <mason.huo@starfivetech.com> | 2022-12-30 11:14:41 +0300 |
|---|---|---|
| committer | Mason Huo <mason.huo@starfivetech.com> | 2023-02-28 12:39:45 +0300 |
| commit | be223313910549a3d6dd60b7e9fb747c01f38f7f (patch) | |
| tree | 912a861f6f69e355edcf2d05dcc3a02daaf1f12c /board | |
| parent | 180d4c4a92850abeeda3493e1c68b86f15af9d63 (diff) | |
| download | u-boot-be223313910549a3d6dd60b7e9fb747c01f38f7f.tar.xz | |
board: starfive: jh7110: Add cpu voltage set commands
Get the binning information from OTP,
and set change the cpu max voltage accordingly.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/starfive/evb/starfive_evb.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/board/starfive/evb/starfive_evb.c b/board/starfive/evb/starfive_evb.c index b3d3a1de9b..e1e3f2dbc4 100644 --- a/board/starfive/evb/starfive_evb.c +++ b/board/starfive/evb/starfive_evb.c @@ -25,8 +25,15 @@ enum chip_type_t { CHIP_MAX, }; +enum cpu_voltage_type_t { + CPU_VOL_1040 = 0xff, + CPU_VOL_1060 = 0xf0, + CPU_VOL_1080 = 0xf1, +}; + #define SYS_CLOCK_ENABLE(clk) \ setbits_le32(SYS_CRG_BASE + clk, CLK_ENABLE_MASK) +#define CPU_VOL_BINNING_OFFSET 0x7fc static void sys_reset_clear(ulong assert, ulong status, u32 rst) { @@ -192,6 +199,32 @@ static u32 get_chip_type(void) return value; } +#if CONFIG_IS_ENABLED(STARFIVE_OTP) +static void get_cpu_voltage_type(struct udevice *dev) +{ + int ret; + u32 buf = CPU_VOL_1040; + + ret = misc_read(dev, CPU_VOL_BINNING_OFFSET, &buf, sizeof(buf)); + if (ret != sizeof(buf)) + printf("%s: error reading CPU vol from OTP\n", __func__); + else { + switch ((buf & 0xff)) { + case CPU_VOL_1080: + env_set("cpu_max_vol", "1080000"); + break; + case CPU_VOL_1060: + env_set("cpu_max_vol", "1060000"); + break; + case CPU_VOL_1040: + default: + env_set("cpu_max_vol", "1040000"); + break; + } + } +} +#endif + /*enable U74-mc hart1~hart4 prefetcher*/ static void enable_prefetcher(void) { @@ -259,6 +292,9 @@ err: eth_env_set_enetaddr("eth1addr", mac1); chip = get_chip_type(); +#if CONFIG_IS_ENABLED(STARFIVE_OTP) + get_cpu_voltage_type(dev); +#endif jh7110_gmac_init(0, chip); jh7110_gmac_init(1, chip); return 0; |