diff options
| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2023-02-06 11:10:45 +0300 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-02-17 14:07:48 +0300 |
| commit | e74e21ceb3fe476e09b4068b4f986aabed2c9463 (patch) | |
| tree | d3529bd4e1480223a2db1c97bc0326641878f77e /board | |
| parent | 55ca747f66742d15829f8706a633849d9013bab5 (diff) | |
| download | u-boot-e74e21ceb3fe476e09b4068b4f986aabed2c9463.tar.xz | |
board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()
The L2-cache is not enabled currently, the enbale_caches() will call
the v5l2_enable() callback to enable it in SPL.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/AndesTech/ax25-ae350/ax25-ae350.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 63a966e092..1c2288b6ce 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <cpu_func.h> #include <flash.h> #include <image.h> #include <init.h> @@ -72,6 +73,14 @@ void *board_fdt_blob_setup(int *err) return NULL; } +#ifdef CONFIG_SPL_BOARD_INIT +void spl_board_init() +{ + /* enable v5l2 cache */ + enable_caches(); +} +#endif + int smc_init(void) { int node = -1; @@ -96,18 +105,10 @@ int smc_init(void) return 0; } -static void v5l2_init(void) -{ - struct udevice *dev; - - uclass_get_device(UCLASS_CACHE, 0, &dev); -} - #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { smc_init(); - v5l2_init(); return 0; } |