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authorTom Rini <trini@konsulko.com>2023-06-12 23:42:37 +0300
committerTom Rini <trini@konsulko.com>2023-06-12 23:42:37 +0300
commit7da82de916d6aaeeef62431810cb3335e1207b28 (patch)
tree9d994cb47482d2679acd701ebb09d0caf4b2122f /common/spl/spl.c
parent260d4962e06c0a7d2713523c131416a3f70d7f2c (diff)
parent89240bc0c44b985e461a4220475cb462263df5be (diff)
downloadu-boot-7da82de916d6aaeeef62431810cb3335e1207b28.tar.xz
Merge tag 'xilinx-for-v2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.10-rc1 global: - Use proper U-Boot project name Fix sparse warnings in zynqmp-clk, zynqmp handoff, board cmd: - Cover incorrect 0 length entries Versal NET: - Add bootmode logic - Support SPP production version - Add loadpdi command ZynqMP: - Clear pmufw node command ID handling - Change power domain behavior around zynqmp_pmufw_node() - Fix zynqmp cmd return values and pmufw command - Fix R5 tcm init and modes mmc: - Sync Versal NET emmc DT binding pcie: - Add support for ZynqMP PCIe root port video: - Add support for ZynqMP DP tools: - Fix debug message in relocate-rela
Diffstat (limited to 'common/spl/spl.c')
-rw-r--r--common/spl/spl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 801c4b507c..d74acec10b 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -321,7 +321,7 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
spl_image->fdt_addr = (void *)dt_data;
if (spl_image->os == IH_OS_U_BOOT) {
- /* HACK: U-boot expects FDT at a specific address */
+ /* HACK: U-Boot expects FDT at a specific address */
fdt_hack = spl_image->load_addr + spl_image->size;
fdt_hack = (fdt_hack + 3) & ~3;
debug("Relocating FDT to %p\n", spl_image->fdt_addr);