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author | Tom Rini <trini@konsulko.com> | 2019-10-09 23:22:03 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2019-10-09 23:22:03 +0300 |
commit | 44fb0d6c9f5147a41c710032869e5e01b3c9e310 (patch) | |
tree | f0c7932d0a8a688095e95f7d1de17be4f7d3af0b /common/spl | |
parent | 548aefa5b9e5c31681e0a8bd78e96b66eedd1137 (diff) | |
parent | bcaa0e3302e384ad65c352b385678acdf3f20c0a (diff) | |
download | u-boot-44fb0d6c9f5147a41c710032869e5e01b3c9e310.tar.xz |
Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx/FPGA changes for v2020.01
FPGA:
- Enable fpga loading on Versal
- Minor fix
Microblaze:
- Fix LMB configurations to support initrds
- Some other cleanups
Zynq:
- Minor config/dt changes
- Add distro boot support for usb1 and mmc1
- Remove Xilinx private boot commands and use only distro boot
ZynqMP:
- Kconfig cleanups, defconfig updates
- Update some dt files
- Add firmware driver for talking to PMUFW
- Extend distro boot support for jtag
- Add new IDs
- Add system controller configurations
- Convert code to talk firmware via mailbox or SMCs
Versal:
- Add board_late_init()
- Add run time DT memory setup
- Add DFU support
- Extend distro boot support for jtag and dfu
- Add clock driver
- Tune mini configurations
Xilinx:
- Improve documentation (boot scripts, dt binding)
- Enable run time initrd_high calculation
- Define default SYS_PROMPT
- Add zynq/zynqmp virtual defconfig
Drivers:
- Add Xilinx mailbox driver for talking to firmware
- Clean zynq_gem for Versal
- Move ZYNQ_HISPD_BROKEN to Kconfig
- Wire genphy_init() in phy.c
- Add Xilinx gii2rgmii bridge
- Cleanup zynq_sdhci
- dwc3 fix
- zynq_gpio fix
- axi_emac fix
Others:
- apalis-tk1 - clean config file
Diffstat (limited to 'common/spl')
-rw-r--r-- | common/spl/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 57d06ccece..92de9cd744 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -139,6 +139,7 @@ config SPL_TEXT_BASE default 0x10060 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN9I default 0x20060 if MACH_SUN50I_H6 default 0x00060 if ARCH_SUNXI + default 0xfffc0000 if ARCH_ZYNQMP default 0x0 help The address in memory that SPL will be running from. |