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author | Tom Rini <trini@konsulko.com> | 2019-05-26 21:45:25 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2019-05-26 21:45:25 +0300 |
commit | 344a0e4367d0820b8eb2ea4a90132433e038095f (patch) | |
tree | bf58156bdb467305dac74f175f5c81ef615d49ac /configs/MPC8349ITXGP_defconfig | |
parent | cc1e98b559e46630c3421a7762d02a58e5480926 (diff) | |
download | u-boot-344a0e4367d0820b8eb2ea4a90132433e038095f.tar.xz |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/MPC8349ITXGP_defconfig')
-rw-r--r-- | configs/MPC8349ITXGP_defconfig | 92 |
1 files changed, 43 insertions, 49 deletions
diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig index eddb72b1e0..b4cf8c33d0 100644 --- a/configs/MPC8349ITXGP_defconfig +++ b/configs/MPC8349ITXGP_defconfig @@ -97,12 +97,55 @@ CONFIG_LBLAW3=y CONFIG_LBLAW3_BASE=0xF0000000 CONFIG_LBLAW3_NAME="CF" CONFIG_LBLAW3_LENGTH_64_KBYTES=y +CONFIG_ELBC_BR0_OR0=y +CONFIG_BR0_OR0_NAME="FLASH" +CONFIG_BR0_OR0_BASE=0xFE000000 +CONFIG_BR0_PORTSIZE_16BIT=y +CONFIG_OR0_AM_16_MBYTES=y +CONFIG_OR0_XAM_SET=y +CONFIG_OR0_SCY_15=y +CONFIG_OR0_CSNT_EARLIER=y +CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y +CONFIG_OR0_XACS_EXTENDED=y +CONFIG_OR0_TRLX_RELAXED=y +CONFIG_OR0_EHTR_8_CYCLE=y +CONFIG_OR0_EAD_EXTRA=y +CONFIG_ELBC_BR1_OR1=y +CONFIG_BR1_OR1_NAME="VSC7385" +CONFIG_BR1_OR1_BASE=0xF8000000 +CONFIG_OR1_AM_128_KBYTES=y +CONFIG_OR1_SCY_15=y +CONFIG_OR1_CSNT_EARLIER=y +CONFIG_OR1_XACS_EXTENDED=y +CONFIG_OR1_SETA_EXTERNAL=y +CONFIG_OR1_TRLX_RELAXED=y +CONFIG_OR1_EHTR_8_CYCLE=y +CONFIG_OR1_EAD_EXTRA=y +CONFIG_ELBC_BR2_OR2=y +CONFIG_BR2_OR2_NAME="LED" +CONFIG_BR2_OR2_BASE=0xF9000000 +CONFIG_OR2_AM_2_MBYTES=y +CONFIG_OR2_SCY_9=y +CONFIG_OR2_CSNT_EARLIER=y +CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y +CONFIG_OR2_XACS_EXTENDED=y +CONFIG_OR2_TRLX_RELAXED=y +CONFIG_OR2_EHTR_8_CYCLE=y +CONFIG_OR2_EAD_EXTRA=y +CONFIG_ELBC_BR3_OR3=y +CONFIG_BR3_OR3_NAME="CF" +CONFIG_BR3_OR3_BASE=0xF0000000 +CONFIG_BR3_PORTSIZE_16BIT=y +CONFIG_BR3_MACHINE_UPMA=y +CONFIG_OR3_BI_BURSTINHIBIT=y CONFIG_HID0_FINAL_ICE=y CONFIG_HID2_HBE=y CONFIG_ACR_PIPE_DEP_4=y CONFIG_ACR_RPTCNT_4=y CONFIG_SPCR_TSEC1EP_3=y CONFIG_SPCR_TSEC2EP_3=y +CONFIG_LCRR_DBYP_PLL_BYPASSED=y +CONFIG_LCRR_CLKDIV_4=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000" @@ -131,52 +174,3 @@ CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y -CONFIG_ELBC_BR0_OR0=y -CONFIG_BR0_OR0_NAME="FLASH" -CONFIG_BR0_OR0_BASE=0xFE000000 -CONFIG_BR0_MACHINE_GPCM=y -CONFIG_BR0_PORTSIZE_16BIT=y -CONFIG_OR0_AM_16_MBYTES=y -CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR0_CSNT_EARLIER=y -CONFIG_OR0_EAD_EXTRA=y -CONFIG_OR0_SCY_15=y -CONFIG_OR0_XACS_EXTENDED=y -CONFIG_OR0_XAM_SET=y -CONFIG_OR0_TRLX_RELAXED=y -CONFIG_OR0_EHTR_8_CYCLE=y -CONFIG_ELBC_BR1_OR1=y -CONFIG_BR1_OR1_NAME="VSC7385" -CONFIG_BR1_OR1_BASE=0xF8000000 -CONFIG_BR1_MACHINE_GPCM=y -CONFIG_BR1_PORTSIZE_8BIT=y -CONFIG_OR1_AM_128_KBYTES=y -CONFIG_OR1_CSNT_EARLIER=y -CONFIG_OR1_EAD_EXTRA=y -CONFIG_OR1_SCY_15=y -CONFIG_OR1_SETA_EXTERNAL=y -CONFIG_OR1_XACS_EXTENDED=y -CONFIG_OR1_TRLX_RELAXED=y -CONFIG_OR1_EHTR_8_CYCLE=y -CONFIG_ELBC_BR2_OR2=y -CONFIG_BR2_OR2_NAME="LED" -CONFIG_BR2_OR2_BASE=0xF9000000 -CONFIG_BR2_MACHINE_GPCM=y -CONFIG_BR2_PORTSIZE_8BIT=y -CONFIG_OR2_AM_2_MBYTES=y -CONFIG_OR2_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR2_CSNT_EARLIER=y -CONFIG_OR2_EAD_EXTRA=y -CONFIG_OR2_SCY_9=y -CONFIG_OR2_XACS_EXTENDED=y -CONFIG_OR2_TRLX_RELAXED=y -CONFIG_OR2_EHTR_8_CYCLE=y -CONFIG_ELBC_BR3_OR3=y -CONFIG_BR3_OR3_NAME="CF" -CONFIG_BR3_OR3_BASE=0xF0000000 -CONFIG_BR3_MACHINE_UPMA=y -CONFIG_BR3_PORTSIZE_16BIT=y -CONFIG_OR3_AM_32_KBYTES=y -CONFIG_OR3_BI_BURSTINHIBIT=y -CONFIG_LCRR_DBYP_PLL_BYPASSED=y -CONFIG_LCRR_CLKDIV_4=y |